Session: WSA

RF Interference Mitigation Techniques


Ranjit Gharpurey, Univ. of Texas at Austin


Chris Rudell, Univ. of Washington


This full-day workshop will consist of speakers that address a wide range of problems related to transceiver interference management and suppression. Topics will include general techniques to improve receiver selectivity and reduce transmitter unwanted spurious spectrum. Speakers will come from a diverse set of backgrounds which include system, circuit, and technology design all with the goal of interference mitigation either through filtering or cancellation techniques. Presentations will focus on transceiver circuit design to enhance linearity, dynamic range, improve synthesizer phase noise, and cancellation methods, all for improved selectivity performance. Other topics which address emerging areas that attempt to improve overall spectral efficiency by realizing full-duplex systems capable of simultaneous transmit and receive (STARS) on the same frequency are also discussed. In addition, some speakers will focus on new MEMs technologies to improve transceiver interference mitigation. Further presentations on system/networking strategies related to integrating radios in the context of interference mitigation will be given.




Electrical-Balance Duplexing for RF Self-Interference Cancellation to Enable In-Band Full-Duplex

Barend van Liempd; IMEC

In-band full duplex is a relatively new communication paradigm where the TX and RX operate at the same time, using the same spectral resources. In this case, the local TX causes so-called self interference at exactly the same frequency as the wanted signal and with much higher magnitude than the wanted signal. To enable such wireless links, the self interference must be cancelled, suppressed or filtered at various stages throughout the RX chain.
This talk discusses electrical balance duplexers as part of the solution, providing high self interference cancellation directly at RF frequencies, thereby severely reducing receiver constraints. These duplexers mimic an antenna's impedance using an on chip tunable dummy impedance to ensure destructive cancellation of the self interference at the RX port. System-level specifications as well as design techniques are discussed, to give insight into both current state of the art and on going research on this promising technique.




Micromechanical Filters: Fundamentals and Application to Interference Mitigation

Roy H. Olsson III; DARPA

The radio frequency (RF) spectrum is becoming increasingly crowded, with more users accessing an increasing amount of bandwidth. As a result, wireless handsets are experiencing a rapid increase in the number of frequencies and standards supported on a single platform. While the other components that comprise the RF front-end such as amplifiers, mixers and switches are experiencing higher levels of co-integration, a modern cellular radio includes > 30 discrete filter dies to accommodate the growing number of RF bands. A miniature and adaptive filter technology that supports many wireless standards on a single chip is needed to continue the increase in wireless data and functionality seen over the past decade.

Piezoelectric microresonators are an enabling technology for increasing adaptability, improving performance and miniaturization of RF devices. This talk will present an overview of piezoelectric microresonator and filter research. First, the need for adaptive and reconfigurable filtering in next generation wireless devices will be described. The performance and adaptability advantages derived from micromachining of piezoelectric resonators will be presented, followed by a comparison with competing technologies. Reconfigurable filter arrays realized in thin film piezoelectric materials will be presented along with the application of these components in adaptive wireless systems. Finally, a look toward next generation piezoelectric materials and devices such as thin film lithium niobate resonators and tunable acoustic filters will be discussed.





Interference Rejection exploiting Switched-R-C Techniques Compatible with CMOS

Eric Klumperink; University of Twente

With the increasing number of wireless users, interference rejection is becoming the main design challenge in CMOS Receiver front-ends. Techniques to improve the Spurious Free Dynamic Range (SFDR) of radio receivers and cancel interference are hence important. As CMOS technology offers switches that improve with technology, while highly linear capacitors and resistors are also available, these are the components of choice to realize high SFDR. This contribution will review some recently proposed ideas to improve the SFDR of CMOS radio receivers. Examples are mixer-first receivers exploiting switched-R or switch-R-C circuits, and N-path filters that simultaneously realize spatial domain and frequency domain filtering. Also, an in-band full-duplex receiver will be discussed.




Broadband channelizer architectures with dynamic range relaxation

Ranjit Gharpurey; University of Texas at Austin

Architectures for implementation of broadband channelizers will be described. These architectures split a broad bandwidth into contiguous sub-bands with a single fixed frequency LO source. Frequency-translation based techniques for interference suppression in such broadband radios will be described. The use of channelizers for rapid interference detection will be discussed.




Self-Interference Cancellation and Filtering Techniques for Reconfigurable Frequency-Division-Duplex/Full-Duplex/Co-Existing Radios

Harish Krishnaswamy; Columbia University

Multi-band frequency-division duplex radios require numerous off-chip duplexers, which limit the form factor in mobile applications. Self-interference cancellation can relax duplexer isolation requirements, enabling compact/tunable duplexers. Full-duplex radios have recently emerged as a promising paradigm to double network capacity and spectrum utilization. Self-interference cancellation to the tune of >100dB is mandatory in such systems, and must be pursued in the antenna, RF/analog and digital domains.




Self-Interference Cancellation in the RF Domain

Sachin Katti; Stanford University

Self-interference arises when radios are tightly packed in a device, its experienced in-band, adjacent-band and out of band. These are commonly known as in-band full duplex, frequency division full duplex and radio coexistence in industry parlance. This talk reviews our recent work on self-interference cancellation, and discusses how it can be applied to handle self-interference problems in multi-band multi-protocol devices.




Interference in Near-Field Communications (NFC) circuits for mobile handsets

Magnus Wiklund; Qualcomm Corporation

Integrating multiple standards in mobile handsets presents numerous difficulties with respect to interference. Typical connectivity systems feature WLAN, BT, FM, GPS, and NFC in various combinations; in most applications connectivity must coexist with WAN. Despite challenges with co-existence of multiple radio standards a user expect their simultaneous operation to be seamless. This paper focuses on the NFC technology with special emphasis to the transmitter and fundamental characteristics of the NFC system.




Strategies for Transmitter Self-Interference Management & Mitigation

Chris Rudell; University of Washington

Management of self-interference using numerous discrete duplex filters has become a major barrier for current and future multi-band highly-programmable full duplex radios. This presentation explores some of the potential alternative integrated architectures to address self-interface without the need for costly and area consuming discrete filters. A key challenge for any self-interference cancellation systems is the potential injection of noise in the receiver front-end, the matching of phase and amplitude between the RX input and the canceller. These topics will be explored and some results from a recent integrated self-interference cancellation will be presented.




Session: WSB

Digital and Analog Techniques for Power-Efficiency Enhancement in Wireless Transmitters


 Oren Eliezer, EverSet Technologies / TallannQuest


 Ayman Fayed, Iowa State University


 Transmitter power-efficiency has always represented a significant challenge in wireless devices, whether these are for battery-operated mobile devices or infrastructure applications.
As the targeted bandwidths become wider and the spectral efficiencies higher, it is becoming even more challenging to develop power-efficient transmitters that meet all the requirements of the wireless systems they serve.
This workshop, involving experts from industry and academia, will cover various architectures and techniques for power-efficient transmitters, including both analog and digital approaches.




The Three Operating Modes of Dynamic-Power-Supply Transmitter

Earl McCune; RF Communications Consulting

Any amplifier operated with a varying power supply is actually a 3-port circuit. When an amplifier is characterized as a 3-port for dynamic power supply operation, three separate operating modes (2 nonlinear, 1 linear) appear: L-mode, C-mode, and P-mode. Each of these modes, along with their relationships and differences, are presented and discussed.




Integrated and non-integrated Envelope Tracking Solutions

Jerry Lopez; NoiseFigure Research / Texas Tech University

The recent necessity for wide bandwidth and lower power communications systems have increased the need for highly-efficient highly-linear power amplifiers (PA). Current communication protocols can reach up to 12dB peak-to-average ratio (PAR), which directly affects the linearity and efficiency of the PA. Techniques such as envelope-tracking (ET) and envelope-modulation (EM) are being utilized to increase efficiency and enhance linearity of the amplifier even when operated at compressed modes. In this tutorial, we will analyze ET and EM systems from a basic level to its recent forms including current testing techniques. An overview of envelope modulators, including integrated and non-integrated versions, will be offered. Future high-power and sub-watt ET/EM systems will also be discussed.




Design Challenges of Envelope Tracking and Polar Architectures as Supply-Modulation Based Techniques for Enhancing Transmitter Efficiency

Jennifer Kitchen and Bertan Bakkaloglu; Arizona State University

This tutorial will provide an overview of design challenges and advances in supply-modulation techniques for improving transmitter efficiency. A comparison of existing adaptive biasing architectures and their implications to the RF transmitter's electrical efficiency and linearity will be presented. Emphasis will be placed on practical limitations for implementing envelope tracking and polar transmitters; highlighting the supply modulator's design challenges. The best-in-class published performance for the most recent works in supply-modulation based architectures, including the envelope-tracking Doherty and 'digital' bias modulation, will also be discussed.




Outphasing Techniques for Achieving High-Efficiency in Transmitters

Taylor Barton; University of Texas at Dallas

Outphasing amplifiers control their output power using relative phase control of efficient branch PAs, offering the potential for linear amplification with high efficiency over a wide range of output power levels. The advantage of this approach is the high efficiency of the constituent branch PAs, which can be highly saturated or operate in switched-mode. Conventional outphasing techniques, however, have several limitations in achievable efficiency, primarily relating to the power combining network. This talk will present an overview of classic outphasing techniques, including systems based on isolating and lossless power combining. It will then focus on more recent techniques to improve efficiency under backoff, including integrated implementations.




Power Supply Noise Mitigation techniques for RF PAs

Ayman Fayed; Iowa State University

RF Power Amplifiers (PAs) are typically the most power-demanding components in wireless transmitters. Therefore, converting power from the battery to these PAs as efficiently as possible is very critical. Although switching power converters are known to be highly efficient, adopting them to power RF PAs faces many hurdles, particularly due to the switching noise associated with them, which tends to significantly degrade the system performance. This tutorial will discuss various techniques to mitigate the impact of this switching noise, including active ripple cancellation, delta-sigma control, and different spread-spectrum control techniques.




A Fully Integrated High-Efficiency Digital Transmitter Based on PWM and Class-D PA

Lei Ding and Rahmi Hezar; Texas Instruments

 This tutorial presents a fully digital transmitter architecture that can be used to replace the entire analog/RF signal chain in a traditional transmitter. The new architecture utilizes sigma-delta modulation and pulse-width modulation to convert high resolution baseband I and Q signals into 3-level switching signals, thereby allowing efficient Class-D PA stages to be used. In addition, cascaded sigma-delta stages and switched-capacitor combining are incorporated into the architecture to significantly reduce the out-of-band quantization noise while maintaining excellent efficiency. The digital transmitter architecture is demonstrated through a 45 nm CMOS test chip, which achieves excellent efficiency and linearity.



Linearizing Power Amplifiers with Class-G Analog Voltage-Supply Modulators

Jeffery Walling; University of Utah

 With increasing energy demands for wireless PAs, improvements in energy efficiency are vital. CMOS optimization for low switching resistance leads to the use of CMOS switched-mode power amplifiers. These amplifiers rely on external linearization circuits to amplify non-constant envelope modulated signals. In this talk, we will compare several techniques for linearization, with particular emphasis on analog supply modulation techniques. Practical design considerations for RF switched-mode PAs will be given, along with design considerations for analog supply modulators. Several techniques will be compared and a case-study of a class-G analog supply modulator will be examined in detail.



Digital Approaches for Power Efficiency Enhancement in Transmitters

Oren Eliezer1 and Sankalp Modi2; 1EverSet Technologies / TallannQuest, 2University of Texas at Dallas

 This tutorial proposes a unique digital approach to realizing power-efficient transmission, which is based on a lookahead window that provides a prediction of a segment of the envelope of the signal. Examples for implementations of this digitally intensive approach will be given, including several different envelope tracking systems and a Doherty based architecture for a high-power transmitter.




Session: WSC

Highly Efficient RF Frequency Generation in Nanometer CMOS Technologies


 Salvatore Levantino, Politecnico di Milano


 Stefano Pellerano, Intel Corp.


 The energy efficiency of RF frequency synthesizers is of paramount importance in high-performance mobile radios that pose stringent phase-noise requirements, as well as in emerging wireless applications that feature extremely low power budgets (sensors, wearables, internet of things). Unfortunately, improving spectral purity in conventional phase-locked loops is obtained at the price of higher power consumption. This workshop will discuss the most relevant directions that have been investigated in recent years to break this trade-off by both circuit design and architectural innovations. The workshop will begin by reviewing the fundamental limitations of the phase-noise-versus-power trade-off in oscillators and the recent advances in the design of highly efficient oscillators operating in unconventional classes. Then, it will move to discuss the main architectural innovations relaxing the noise-power trade-off in fractional-N PLLs: (i) adaptive phase-noise cancellation, (ii) nested-and-cascaded architecture, (iii) sub-sampling phase detection, (iv) injection-locked PLLs. As CMOS technologies scale down and accurate DSP is enabled at low power and small area, the traditional analog PLLs are also moving towards mostly digital designs, which are demonstrating better efficiency and scalability, and even towards fully digital designs, achieved via automatic synthesis-and-layout flow. In the second half of the workshop, the most recent realizations of analog, hybrid and digital frequency synthesizers will be critically compared from the efficiency and the scalability points of view.




Fundamental limitations in LC oscillators noise-power efficiency

Danilo Manstretta; University of Pavia, Italy

Modern communication systems need clocks with very low phase noise (or jitter). Another increasingly key requirement is low power consumption, leading to the prominence of the phase noise vs power trade-off. To minimize power dissipation for a given phase noise integrated oscillators often use as load high-Q LC-resonators. Through the years several topologies have been proposed. However, it is not always easy to ascertain whether the dominant reason of improvements comes from topology or improved resonator Q. The goal of this talk is to ascertain the ultimate performance limit for some of the most used oscillators, including most types of class-B (standard, AC-coupled and with tail filter), class-C and class-F LC oscillators as well as distributed oscillators (traveling-wave and standing-wave and hybrid). In the past, many authors have analyzed oscillators generally preferring rigor to intuitiveness. An intuitive yet sufficiently accurate formulation of phase noise is presented. To compare different topologies an excess noise factor that represents the difference between the maximum achievable Figure of Merit and the actual one is also introduced. In addition, the theory is experimentally verified in a rigorous and objective way comparing different topologies in the exact same operating conditions, i.e. technology, Q of the tank, dividers, etc. Measurements on several chip prototypes allow to verify, in an unbiased way a very good agreement between the model and both simulations and measurements.




Fully Integrated Phase Noise Extraction and Cancellation Techniques for Ring Oscillator Based Fractional-N PLLs

Bertan Bakkaloglu; Arizona State University, Tempe, AZ, USA

Ring-oscillators (ROs) provide a low-cost digital VCO solution in fully integrated PLLs. However due to their supply noise sensitivity and high noise floor, their applications have been limited to low performance applications. The proposed architecture introduces an analog feed-forward adaptive phase noise cancellation architecture that extracts and suppresses phase noise of ring-oscillators outside the PLL bandwidth. The proposed technique can improve the phase noise at an arbitrary offset frequency and bandwidth, and after initial calibration for gain it is insensitive to process, voltage and temperature variations. An experimental fractional PLL, with a loop bandwidth of 200 kHz is utilized to demonstrate the active phase noise cancellation approach. The cancellation loop is designed to suppress the phase noise at 1 MHz offset by 12.5 dB and reference spur by 13 dB with less than 17% increase in the overall power consumption at 5.1 GHz frequency. The measured phase noise at 1 MHz offset after cancellation is -105 dBc/Hz. The proposed RO-PLL is fabricated in 90nm CMOS process. With noise cancellation loop enabled, the PLL consumes 24.7 mA at 1.2V supply.




Low-noise high-OSR sigma-delta fractional-N frequency synthesizer

SeongHwan Cho; Korean Advanced Institute of Science and Technology, KAIST, Daejon, Korea

In this talk, reference multiplication techniques to achieve low-noise low-power fractional-N frequency synthesizer is presented by means of nested and cascaded PLL architecture. In the nested-PLL, intermediate output of the feedback divider is used as the delta-sigma modulator (DSM) clock so that the DSM achieves high oversampling ratio (OSR) and thus low quantization noise. Noise aliasing due to the divider is suppressed by having an anti-alias filter implemented using a PLL. In the cascaded-PLL, reference multiplied fractional-N synthesis is achieved by employing two PLLs in cascade: an integer-N PLL followed by a fractional-N PLL. In order to reduce the spur and phase noise of the integer-N PLL, reference injection scheme with dual-pulse ring oscillator is used, which eliminates the need for injection timing adjustment. Prototype results of these PLLs in 130nm CMOS demonstrate state-of-the-art noise and power consumption without requiring any complex calibration




High-performance fractional-N frequency synthesizers with large divided ratios

Tai-Cheng Lee; National Taiwan University, Taipei, Taiwan

For conventional charge-pump-based PLLs, charge pump circuits and phase detectors are the dominant sources of in-band noise, especially for the one with a large divided ratio. Furthermore, Σ-Δ modulators in fractional-N PLLs induce significant quantization noise to deteriorate the phase noise of the output clocks. Sampling-based PLLs are proposed to achieve better performance. In this talk, prior arts on fractional-N PLL design are reviewed first. Then, the detail design and an analysis of a sub- sampling PLL are introduced to achieve a low in-band phase noise of -112 dBc/Hz at a 2.3-GHz output frequency.


Synthesizable Digital PLL Using Injection-Lock Architecture

Kenichi Okada; Tokyo Institute of Technology, Tokyo, Japan

In this presentation, a synthesizable PLL using the injection-lock technique is introduced. Synthesizable PLLs using common digital synthesis tools can be portable and scalable for process technology, which is advantageous in nanometer-scale CMOS technology. An injection-lock PLL is one of the good candidates of synthesizable PLL because the feed-forward phase-lock mechanism can relax the fine timing design of TDC/DTC-based PLL.




Ring-Based RF Digital Frequency Synthesizers

Amr Elshazly; Intel Corporation, Hillsboro, OR, USA

Ring-based digital frequency synthesizers have recently become popular as they offer certain advantages over their analog and LC-based counterparts. Ring-based DPLLs offer great area savings, immunity to PVT variations, simplify several aspects of the design, and easier portability to newer processes. This presentation describes DPLL implementations identifying the design bottlenecks, and discusses recent design techniques proposed to achieve high performance with low power for both integer-N and Fractional-N ring-oscillator based RF digital frequency synthesizers.




Area efficient analog PLLs

Jing-Hong Conan Zhan; Mediatek, Hsinchu, Taiwan

It is generally believed that ADPLL will benefit directly from process scaling in terms of power and area. In this workshop, what limits conventional analog PLL from scaling will be revisited. Recent techniques and design examples toward an area-efficient analog PLL will be reviewed. Analog PLL area shrink with respect to process scaling will be discussed.




The best of both worlds: combining digital and analog techniques in high performance PLLs

Mark Ferriss; IBM T. J. Watson Research Center, Yorktown Heights, NY, USA

The recent interest in digital PLLs is primarily motivated by a search for circuits which are architecturally better aligned with modern digital-oriented CMOS manufacturing processes. However, some of the best features of analog PLLs, for example, highly linear phase detection, are difficult to replicate in fully digital PLLs. In this work, we demonstrate how digital and analog PLLs can be combined in a hybrid PLL such that the best features of both architectures can by utilized, while avoiding the worst features of both. In addition, we will demonstrate how advanced ΔΣ noise cancellation can be implemented in the context of a hybrid PLL. This will be demonstrated in the context of a 13 to 26GHz highly flexible hybrid PLL with an embedded ΔΣ noise cancellation scheme.




Ultra-High Speed Direct Digital Frequency Synthesis

Fa Foster Dai; Auburn University, Alabama, USA

The recent success of ultra-high-speed direct digital synthesizer (DDS) provides an excellent solution to wideband complex waveform generation and digital modulation for applications such as digital radar, telemetry, RF sensor, instrument and wireless communication. This talk presents advanced high-speed DDS designs, focusing on techniques that can achieve high clock frequency, low power, high dynamic range and improved spectral performance. Techniques such as spur cancellation, pre-distortion, ΣΔ modulation, digital calibration and time-interleaving are addressed. A number of design examples are presented to illustrate the state-of-the-art developments in this field. A SiGe DDS MMIC with 11-bit phase and 10-bit amplitude resolutions achieves clock frequency of 8.6 GHz and spurious-free-dynamic-range (SFDR) of 45 dBc at 4.3 GHz Nyquist output.




Session: WSD

Mulit-Gbps Wireline Transceivers: Inching Closer to RF/MM-wave IC Domain


Hiva Hedaytai, Xilinx


Mona Hella, Rensselaer Polytechnic Institute


Burak Catli, Broadcom


High Performance Computing (HPC) installations and exaFLOP supercomputing require high bandwidth chip-to-chip and system-to-system communication links. One critical block in such systems is the Serializer/Deserializer (SerDes) which formats and transfers data over either electrical or optical links. Moving data transfer rates beyond 32Gb/s and 64Gb/s clearly places some of the SerDes design challenges into the RF/Microwave domain. The high data rate coupled to the limits on the transfer medium, require relatively complex modulation techniques. The cost and power consumption have also become more pronounceable, particularly with super data centers employing several thousand of such transceivers. This workshop presents an overview of recent advances and ongoing research in Multi-Gbp/s serial links as it relates to the world of RF/Microwaves. The workshop will cover wideband microwave clock generation schemes, clock and data recovery circuits along with various equalization techniques. In addition 30+GS/s ADC architectures for 60+Gb/s wireline receiver applications will be discussed. We will also explore low-power circuit implementations for 25G+ I/Os, where we discuss both analog and digital implementations.




Design Techniques for Scalable, Sub-pJ/b Serial I/O Transceivers

Prof. Samuel Palermo; Texas A&M University

In order to meet the inter-chip bandwidth demands of future systems and comply with limited IC power budgets, both chip-to-chip data rates and I/O energy efficiency must improve. This is a significant challenge for electrical interconnect architectures, which currently offer the lowest-cost solutions, as the frequency-dependent loss of conventional electrical channels prohibit significant data rate scaling without efficient equalizer circuits. This tutorial will discuss key design techniques that enable scalable, sub-pJ/b serial I/O transceivers. The first part of the tutorial will discuss low power transmitter and receiver designs capable of low-voltage operation and fast power-state transitioning. Next, low-complexity clocking architectures are details. The tutorial concludes with a discussion on low-power equalizer circuits that enable the support of higher data rates over lossy channels.




Design techniques for 25G+ analog & digital I/O implementations

Dr. Thomas Toifl; IBM, Zurich, Switzerland

In this talk we will explore low-power circuit implementations for 25G+ I/Os, where we discuss both analog and digital implementations. We start by giving a short introduction to important wireline I/O standards, and describe the associated equalization requirements. We then turn to the equalization options in the data path using a feed forward equalizer (FFE) and a continuous-time linear equalizer (CTLE), followed by a discussion of design options for decision feedback equalizers (DFE). In the second part of the talk we will turn to digital I/O implementations: Here, we will first discuss the design and recent results of high-speed low-power SAR ADCs. We then describe methods to reduce the latency in the CDR logic, which is required to compensate the latency of the ADC without penalizing jitter tolerance. We will then discuss low-power solutions for digital equalizer implementations.




Review of ADC-Based CDRs and the Challenges for Higher Data Rates

Prof. Ali Sheikholeslami; University of Toronto

ADC-Based Clock and Data Recovery circuits are one of primary candidates for the 60+Gb/s wireline receivers, as they can provide significant channel equalization in digital domain. This is especially important at higher data rates as the channel attenuation become more significant at the Nyquist rate and as the attenuation profile shows a higher complexity that cannot be easily compensated for by analog equalization. The main challenge in designing ADC-based CDRs is their high power consumption, especially the power consumed by the ADC's at the front end. This talk will review the ADC-based CDRs and the techniques proposed to address their challenges.




Transceivers for 40Gbps and 100Gbps Wireline Connections

Dr. Jun Cao; Broadcom

The demand for wireline transceivers running at rates 25Gbps and higher has been fueled by the exponential growth in 40Gb and 100Gb Ethernet in recent years. This talk will first present the design of a transmitter/receiver chipset running at 44Gb/s in 40nm CMOS with state-of-art jitter and power performance. Various techniques are employed to overcome the speed limitation of the technology, including bridged-shunt and T-coil shunt-series peaking and a new pipelined CDR/DMX structure. The design of a low power 4x28Gb/s transceiver for 100GbE is then discussed, particularly the reconfigurable, distributed and tuned clock structure, which saves 70% of power compared to conventional designs. At present, 100G coherent systems are being deployed rapidly but they also pose special challenges in the circuit design. The talk will conclude with the discussion on a quad-channel 128Gb/s coherent DP-QPSK transmitter which achieves an RJ of 103fsrms and I-Q data skew much less than 1ps across the variation in temperature and supplies.




A 40nm High Performance Analog Multi-Tone Transceiver for Multidrop Processor-Memory Interfaces

Prof. Yusuf Leblebici; École polytechnique fédérale de Lausanne, Switzerland

A 7.5 Gb/s mixed NRZ/multi-tone transceiver for multi-drop bus (MDB) memory interfaces is designed and fabricated in 40nm CMOS technology. Reducing the complexity of the equalization circuitry on the RX side, the proposed architecture achieves 1 pJ/bit link efficiency for a MDB channel with 45 dB loss at 2.5 GHz. The transmitted spectrum composed of BB and I/Q sub-bands with the capability to match the modulation frequency of the entire TRX with respect to the channel response over +/-25% range. A switch-cap mixer/filter is developed to down convert and equalize the I/Q sub-bands in RX very efficiently.




Session: WSE

Mixed-Signal Power Amplifiers and RF-DACs


Hua Wang; Georgia Institute of Technology


Robert Staszewski; University College Dublin


Renaldi Winoto; Marvell


The growing demand for a higher data-rate and longer battery life poses stringent requirements on the power amplifiers (PAs) in mobile handset transceivers. Silicon-based PAs, e.g., in CMOS or SiGe HBT processes, have recently emerged as competitive solutions for many applications. Besides low-cost and high integration, silicon-platforms offer unparalleled signal processing/computation capabilities, which can be exploited for PA performance enhancement with low overhead. RF-DAC is one perfect example of this new PA paradigm-shift. It merges digital operation/processing and analog/mixed-signal techniques with PA architectures to achieve efficiency/linearity enhancement, performance self-healing, and antenna load compensation, etc. As a result, advanced silicon PA has expanded from a standalone RF building block to a complex mixed-signal/mixed-mode system with orchestrated collaboration among analog, digital, and large-signal RF operations. This workshop is to review this recent wave of innovations on "Mixed-Signal PAs and RF-DACs" and bring the state-of-the-art technologies to the attendees.




Switched-Mode PA for Broadband and RF-DACs

Prof. Robert Staszewski, University College Dublin

This talk will provide an overview of switched-mode power amplifiers and RF DACs in CMOS wireless transmitters. At the core of this trend is CMOS technology scaling. As the switching speed of CMOS transistors has been increasing, advantages of switched-mode class-E, class-D and class-F operations have been more obvious not only from the power efficiency standpoint, but also from performance and transfer function repeatability. Furthermore, technology scaling has allowed full integration of matching networks between the last stage of PA and an antenna feed, which further allowed to reduce the total solution cost. The final benefit of the technology scaling is the partition of the PA “switch” into a large number of controllable switches for the purpose of amplitude modulation.




Leveraging RF-DACs to Enhance the Doherty PA Architecture

Prof. Hua Wang, Georgia Insititue of Technology

The ever-increasing demand of a high data rate has led to a wide use of spectrum-efficient modulations in modern wireless systems. These schemes often present high peak-to-average power ratios (PAPR), which require the power amplifier (PA) to work at the power back-off (PBO) mode. Moreover, sophisticated constellations are often employed, posing additional linearity requirements on the PA for high fidelity signal transmission. Both aspects may lead to substantially degraded PA efficiency in practice.
We present a CMOS compatible digital Doherty polar power amplifier architecture to address the PA trade-off challenges among power back-off, linearity, and efficiency. Leveraging the digital-intensive architecture, the gain relationship of the Doherty main/auxiliary amplifier paths can be precisely controlled, which achieves optimized Doherty "active load-pulling" operation for enhanced PA back-off efficiency. Moreover, the architecture provides the Doherty power amplifier with highly reconfigurability, linearity improvement, and robust Doherty performance against antenna load mismatch. In addition, we will explore the feasibility of combining this digital Doherty PA scheme with other PA techniques to achieve new RF PA architectures with hybrid-mode efficiency/linearity enhancement.




Switched-Capacitor and Class-G PA

Prof. Jell Walling, University of Utah

With increasing energy demands for wireless PAs, improvements in energy efficiency are vital. Leveraging CMOS prowess as a switch is critical and leads to the development of mixed-signal RF PAs. A switched mode PA modulated by an analog class-G supply modulator will be introduced. Following this, the switched capacitor PA concept will be introduced along with a class-G digitally supply modulated PA. Design considerations for both of these mixed-signal PAs will be discussed in detail, and comparisons and contrasts for the designs will be offered. Specifically tradeoffs in linearity, efficiency and noise will be analyzed and discussed. Detailed design examples will be offered for all of the presented mixed-signal PAs.




Polar Antenna Impedance Detection in a CMOS Power Amplifier and Impedance Tuning with An SOI Switch based Impedance Tuner

Dr. Shouhei Koussai, Tobisha Corporation

The recent demand for wideband and small-sized antenna unfortunately leads to potentially larger antenna load mismatches in practice. However, this is a critical issue for achieving a highly efficient power amplifier in real use. In this talk, an antenna impedance detection and tuning scheme, which takes advantage of the unparalleled CMOS signal processing capability, is presented as a promising solution that could be directly embedded with CMOS power amplifier (PA) designs. Unlike many other reported antenna tuning techniques, we propose a polar impedance scheme, which can detect and correct both real and imaginary antenna impedance mismatches. Our detection circuit is integrated on a CMOS PA chip, and the antenna impedance can be tuned to accurately track non-50Ohm optimum load impedance for the PA with wide frequency range and back-off output power. In addition, the tuning system can handle modulated signals and can track the time-varying antenna load due to the proximity effect.




Self-Healing for Mm-Wave Power Amplifiers

Prof. Steven Bowers, University of Virgina

Advances in CMOS technology create opportunities and challenges for power amplifiers (PAs) at mm-wave frequencies. Process variation, modeling inaccuracies, load impedance mismatch as well as partial and total transistor failure can significantly degrade the performance of the PA at these frequencies, especially early in a process node¹s life-cycle. These uncertainties and variation can require either a less aggressive mm-wave design, multiple design spins, a reduction in yield or some combination of all three. Self-healing uses the vast digital computational power of CMOS through an integrated mixed signal feedback loop to sense performance degradation of the mm-wave circuit, and correct for it by actuating the circuit. This presentation will explore various techniques and costs associated with producing a robust and effective self-healing mm-wave PA and will go through an example of such a system.



Holistic Design Approach for Mm-Wave Digitally-Assisted Power Amplifiers (DAPA) on CMOS and GaN

 Dr. Tim LaRocca, Northrop Grumman

 A top-down design review of the system, circuit and measurements of digitally-assisted power amplifiers (DAPA) on both CMOS and GaN will be provided. This is based on three published designs including a 45GHz and 94GHz 4b DAPA on IBM 10LPe (65nm bulk) and 12SOI (45nm SOI), and 6-18GHz GaN DAPA for 64QAM modulation. This presentation will start with a review of high-level modeling and simulation of the DAPA using VerliogA and CMOS device models to predict efficiency improvements and define system requirements. This will be followed by a brief review of the digital algorithm and implementation including tradeoffs between ASIC and FPGA solutions. Finally, a practical review of the design of the DAPA with explanation of measurements and future work will conclude the talk.



Next Generation Base station Transmitters / RF-DACS

Prof. Leo de Vreede, Delft University of Technology

Next generation base station transmitters need to be efficient and wideband in nature in order to support multiple communication standards / bands in an energy and cost effective manner. The trend to smaller cell sizes, lower transmit powers and increased bandwidths puts new constrains on the TX-system concept, system-integration and the power consumption of the total TX line-up. With this trend in mind, new PA techniques and RF-DAC approaches will be considered that can provide higher system integration, bandwidth and overall line up-efficiency.



Digital Transmitters and RF-DACs for CMOS Transceiver SoCs with Self-Compensation/Predistortion

Dr. Oren Eliezer, EverSet Technologies/TallannQuest

This tutorial will present several extensively-digital topologies for wideband transmitters/RF-DACs, some of which were implemented at Texas Instruments in nanometer CMOS transceiver SoCs.  Productization aspects, such as built-in testing and “self-healing” (built-in calibration and predistortion), will be highlighted.




Session: WSF

Next Generation 77-81 GHz Automotive Radars


Gabriel M. Rebeiz, UCSD


Juergen Hasch, Robert Bosch GmbH


Automotive radars at 77 GHz are being shipped at more than 1 million units per year for long-range radars (LRR) and medium range radars (MRR) with applications in automatic cruise control (ACC), collision avoidance, and in imaging/tracking radars for autonomous driving. Radar topologies include lens-based systems, digital beamforming and RF-beamforming systems. Millimeter-wave radars are essential for autonomous driving, and new systems with wider bandwidths, better tracking and imaging software, and better scanning techniques are being developed to meet this need. This workshop assembles a mix of industry and universities to present the latest techniques in automotive radars, both from the systems/application perspective and from the mm-wave electronics and hardware perspective (antennas, packaging, etc.). The workshop will have a mix of users (Daimler Benz, Toyota), chip/electronic developers (Freescale, Infineon), and Universities, and promises to be comprehensive with a wide but in-depth view of this area.




Trends in Roadway Domain Active Sensing 

Stephen H. Bayless; ITS America

The talk analyzes the merits and limits of active sensing technologies (Radar, LIDAR and Ultrasonic detectors) and how the demands for such technologies is evolving. Of all the roadway domain active sensing technologies, vehicular radar is the best at detecting typical driving conflicts representing the most common crash risks and thus likely will serve as a key component of collision avoidance systems in many next generation smart vehicles. The report examines how future Vehicle-to-Vehicle communications and Active Traffic Management techniques will improve and complement active sensing in vehicle crash avoidance and driving automation.



Present Research Activities and Future Requirements on Radar from a car manufacturer's point of view

Juergen Dickmann; Daimler Benz, Ulm, Germany

AUTOMOTIVE RADARS have been the backbone for active safety and advanced driver assistance systems (ADAS) for decades. With the introduction of the collision prevention assist, Radar sensors have become standard equipment in Mercedes-Benz passenger cars. The range of applications they enable covers detection tasks like blind spot assist up to automated braking systems like the Pre-Safe Brake assist available in the S-Class. For heavy trucks and vans they enable cruise control and braking support. In recent years, radar has more and more also considered as enabler for agency driven safety applications like the EURO-NCAP, which grant star ratings. In former days, single sensor concepts have been applied to realize ADAS, nowadays multi-sensor networks with short-,mid-, and far range radars are being applied. Today, in state of the art cars four to six radars are being used. In 2013, the first stride ahead towards higher automated systems in real serial cars has been made with the Bertha drive with the Mercedes-Benz S-Class Intelligent drive. The higher degree in automation of ADAS, where the driver is going to be exculpated increasingly from the pure driving task, imposes much higher performance to the environmental perception task and hence to the automotive radar. The paper will provide an overview on present automotive radars at Daimler AG, will give an outline on future requirements for highly automated driving and will present some related research examples on radar based environmental perception.




High-Resolution Phased-Array Automotive Radars

Dr. Jae S. Lee; Paul Schamlenburg; Kyosuke Miyagi; Toyota Technical Center, Ann Arbor, Michigan

Automotive radar is a critical sensing unit for vehicle safety, automated driving assistance etc. along with lidar and camera. This talk will introduce superior properties of phased array beam scanning method, prototype system development with SiGe RFIC and its performance verification.




Automotive Radar Technology Trends

Juergen Hasch; Robert Bosch GmbH, Stuttgart, Germany

In the last few years automotive radar has been transformed from being a niche sensor to becoming standard even in middle-class cars. With Euro-NCAP ratings now requiring automated braking and pedestrian safety functionality, radar is often identified as the best suited sensor for this purpose.
Additionally, future automated driving will require detailed and highly reliable information on the environment and surrounding street traffic. This requires radar sensors to provide more detailed information about the environment, foremost in the spatial domain. Automotive radar has always benefited significantly from technological advances, especially in semiconductor technology.
and packaging, allowing a better performance and much more functionality in the radar frontend. A second key area is the antenna system, where new concepts to acquire more information about signals reflected from the environment can significantly improve resolution and detection performance.




Digitally Centric Modulation Schemes on a Software Defined Radar (SDR) Platform

Andreas Stelzer; Johannes Kepler University, Linz

Highly integrated radar sensors are a trade-off of available semiconductor technology, analog bandwidth used, as well as baseband functionality and signal processing capabilities. Based on a software defined radar demonstrator digitally enhanced FMCW systems in combination with various modulation schemes for TDMA-, CDMA-, FDMA-MIMO applications and multi-beam TX phased arrays, are discussed. Alternatives, e.g. OFDM modulation or PRN-based radar sensors with different coding schemes are shown, and a novel PRN-MIMO radar sensor is introduced.
With CMOS technology nodes on one hand reaching the high radar frequencies, on the other hand fully digital-only modulation schemes and signal processing approaches are feasible. In the workshop some approaches towards digital centric approaches in terms of RF-hardware, modulation schemes, and evaluation procedures are tackled, which means a paradigm shift in the RF design flow from the analog towards the digital domain.



Packaging Technology and Production Testing: Key Differentiators for Automotive Radar Front-End Products

Dr. Sergio Palma Pacheco; Freescale Semiconductor, Tempe, AZ

Ever since the advent of the seat belt, safety has become a key differentiator in the automotive industry.  This trend continued with airbags, anti-lock braking systems, and now with stability control.  Although these systems have been pervasive for the past 20 years, the number of accidents and fatalities in the US has remained steady.  The next step on the road towards greater safety is the use of active sensing for collision avoidance.  This talk will cover the development of mm-wave packaging technology and automated production testing capability as key differentiators in the industry.  The main key features, challenges, and future trends for each will be presented; and how these enablers impact automotive radar applications from an overall system and business perspective.




How Can Semiconductor Technology and MMIC Packaging Contribute to Future Success of Automotive Radar?

Dr. Rudolph Lachner; Infineon AG

Today’s market success of automotive radar systems is to a great extend driven by technology. The development is characterized by the transition from old school GaAs based, more or less on discrete millimeter wave design approaches and semi-automated assembly to highly integrated Si-based SoC solutions and automated PCB assembly with standard SMD components. The SoC solutions have significant cost-down potential and offer high levels of manufacturing maturity, yield, automotive quality over the full temperature range and high-volume production capabilities, enabling broad market penetration of radar even in the low priced car segments.  In this talk, I will present state of SiGe radar technology and its related packaging. Examples of products will be given and directions and challenges of future process developments will be outlined.




Antennas Concepts for Automotive Radar Sensors

Prof. Wolfgang Menzel; University of Ulm, Germany

The choice automotive radar antennas is determined by the requirement for high gain and low loss combined with small size and depth, the challenges by the millimeter-wave frequency range, and great cost pressures. Consequently, planar antennas are dominating in the lower frequency range, while lens and reflector antennas had been the original choice at 76.5 GHz, partly in folded configurations, but today planar antennas are being introduced for the mm-wave range as well. With increasing requirements towards a much more detailed observation of the scenery in front or around the vehicle, multi-beam antennas or scanning antennas have been designed, and solutions based on (digital) beamforming with a number of integrated antennas are in use or under development. This contribution will give a general introduction into antenna solutions forn automotive radar and present a number of realized solutions.




Millimeter-wave beamforming chips with built-in-self-test for low-cost radars

Gabriel M. Rebeiz; University of California, San Diego

Phased-array chips with 8 to 16 channels and with transmit and receive capabilities have been developed for low-cost mm-wave automotive radars. One of the cost drivers in these chips is the S-parameter testing at W-band frequencies, and therefore, a new built-in-self-test solution has been implemented which can accurately measure the amplitude and phase of each channel, and measure an entire-chip phased-array pattern. The design and packaging of these chips will be presented together with measured patterns with +/-50o scan angle and actual radar examples.




Session: WSG

Performance Metrics for mm-Wave Devices and Circuits from the Perspective of the International Technology Roadmap for Semiconductors (ITRS)


Dr. Herbert S. Bennett, NIST


Dr. Pete Zampardim RFMD


This workshop will focus on de-mystifying the ITRS RF and Analog/Mixed-Signal Technologies Working Group's mm-wave device technology and circuit roadmapping activities. Device, circuit, and technology performance simulation, scaling, and experimental characterization metrics and techniques will be addressed in detail for the most advanced CMOS, SiGe BiCMOS, III-V HBT and III-V HEMT technologies. Intrinsic device structure as well as layout parasitics will be addressed as potential show stoppers to future scaling. The ever-increasing gap between the intrinsic high frequency performance metrics of CMOS transistors and that of fully wired MOSFETs, not seen in other device types, will be explained.
The workshop will end with an open discussion among the presenters and audience on how different technologies compare to each other. What applications will drive the mm-wave section of the ITRS in the next 15 years? Will the Internet of Things pose new technology performance requirements or is existing technology more than adequate? Are FinFETs faster than Ultra-thin Body and BOX SOI MOSFETs at the same gate length and technology node? What is the real gate length of 22nm and 14nm CMOS technology and why gate length matters? Are the ITRS metric tables accurately reflecting how the technology is going to perform in mm-wave circuits?
Will all existing transistor technologies live and die together in the next ten years? Is there transistor life beyond 2-3nm physical dimensions? Which device type will scale to the highest fT and fMAX? Will mm-wave and THz SoCs be desirable and, if yes, feasible at all or will these corresponding




Roadmaps and Standards for RF and Analog/Mixed-Signal
Technologies: International Roadmap for Semiconductors Perspectives

Herbert S. Bennett; NIST, Gaithersburg, MD, USA

Roadmaps and standards with their associated measurements are key to successful innovation and commercialization and job creation. Mobile devices such as today's smart phones and tablets are rapidly growing segments of the electronics industry and are creating more opportunities for increased growth. As a response to earlier market demands for RF dependent mobile devices the ITRS established in 2001 its Working Group on RF and Analog/Mixed-Signal (RF and AMS) Technologies. This presentation includes: 1) a brief discussion on the history of technology roadmaps and a discussion on the roles that international technology roadmaps and standards play in accelerating the rates of innovation and commercialization of selected technologies, 2) the ITRS process for establishing an industrial consensus on priorities, technical requirements, and difficult challenges, and 3) Why you should be interested in RF technology roadmaps and standards. The latter are invisible catalysts for efficient economies. Essential ingredients for quality technology roadmaps and standards include sound science and engineering principles, reproducible measurements, manageable number of key processing characteristics and performance metrics, and agreement among all stakeholders. Grand challenges are sustaining effective communications, cooperation, and collaboration among stakeholders and understanding interfaces well enough to control and reproduce performance figures of merit in high volume manufacturing.




Scaling, modelling, and exploration of physical limitations of SiGe HBTs

Prof. Michael Schroter; Technical University Dresgen, Germany and UCSD, La Jolla, Ca, USA

The latest ITRS predictions for SiGe HBT technology have been based on combining the results of various one-, two- and three-dimensional TCAD simulation tools with geometry scalable compact modeling. This enables an accurate and consistent determination of all figures of merit for both devices and (benchmark) circuits. This presentation will discuss the overall procedure and the assumptions made for generating the transistor performance results found in the present ITRS tables. An extensive and consistent set of technology and electrical parameters is provided along with the obtained scaling rules. Finally, the expected fabrication related challenges and possible solutions for achieving the predicted performance data will be discussed.




III-V HBT and (MOS) HEMT scaling

Prof. Mark Rodwell, University of California, CA, USA

InP HBTs and HEMTs are today the widest-bandwidth transistors. InP HEMTs provide the lowest noise and the highest (~1.4THz) cutoff frequencies; InP HBTs have ~1.1THz cutoff frequencies, support moderate (~1000 HBT) integration scales, and offer superior RF output power densities (~0.4W/mm at 220GHz, 2.1W/mm at 86GHz). III-V LNAs and PAs are ubiquitous in today's cellular telephones and Wi-Fi transceivers; similarly InP HEMT LNAs and HBT PAs will provide the needed noise figure, output power, and PAE in emerging ~50-500 GHz wireless communications systems. We will present scaling laws and roadmaps of these devices, and examine their scaling potential to ~2-3 THz cutoff frequencies.




Nanoscale CMOS – an RF/mm-wave Perspective

Dr. Kenneth Yau; Broadcom, Irvine, CA, USA

Moore's law has been dictating the scaling of the MOS transistor for several decades. State-of-the-art CMOS technologies currently in production feature minimum gate lengths in tens of nanometers and integration scales that can only be dreamt of not too long ago. With this aggressive scaling, the CMOS transistor has attained current and power gain cut-off frequencies in excess of 300 GHz. RF and millimeter-wave LNA's, PA's and even entire transceivers, which were traditionally the domain of III-V technologies, have been successfully implemented in CMOS. This presentation will focus on the performance metrics of the nano-scale MOS transistor for RF and millimeter-wave applications. Extensive RF figures-of-merit such as Ft and Fmax and their scaling from one technology node to another will be presented. Finally, technology related challenges will be surveyed and possible solutions will be discussed.




State-of-the-art Millimeter-Wave III-V HEMT Technologies

Dr. Keisuke Shinohara; HRL Laboratories, Malibu, CA, USA

Millimeter-wave InP and GaN-based HEMT device and MMIC technologies will be reviewed. InP-HEMTs offer the lowest noise figure and the highest maximum oscillation frequency exceeding 1THz, demonstrating sub-millimeter-wave amplifier MMICs and low-noise amplifiers with a low DC power consumption. Recent progress of GaN-HEMT scaling technologies boosted its cutoff frequencies up to 500 GHz range while maintaining Johnson's figure-of-merit high breakdown performance. The emerging GaN technology enables high-efficiency millimeter-wave power amplifiers, robust low-noise amplifiers with high input power survivability, and low-loss RF switches with high power handling capability.




55nm SiGe BiCMOS technology and beyond. How aggressively can the CMOS be scaled?

Dr. Pascal Chevalier; STMicroelectronics, Crolles, France

55nm SiGe BiCMOS technology developed in STMicroelectronics 300 mm wafer line will be presented. The technology features Low Power and General Purpose CMOS devices (triple gate oxide) and 0.45 µm² 6T-SRAM bit cell. 3 flavors of SiGe HBT with fT ranging from 65 GHz to 320 GHz and fMAX from 270 GHz to 380 GHz associated to BVCEO values between 1.5 V and 3.2 V are offered. A 9 metal layers back-end of line combining the advantages of being fully compatible with the existing 55 nm CMOS libraries and to provide enhanced performance for millimeter-wave passives (inductors, capacitors and transmission lines) is available. Specific varactors dedicated to millimeter-wave applications are also proposed. Perspectives to use more advanced CMOS nodes (40nm and beyond) for next BiCMOS nodes will also be discussed.




mm-Wave RFCMOS Technology

Dr. David Harame; Global Foundries, USA

Advanced node RFCMOS is well suited for mmWave applications because of the high fT of the transistors and the features in the technology. An RFCMOS technology is typically compatible with the base CMOS process so that libraries and IP may be leveraged in designs. Added features include passives such as varactors, capacitors including metal-oxide-metal fringe capacitors, inductors, and transmission lines using layers and processes found in the base CMOS technology.

Performance scaling of advanced node CMOS now requires the incorporation of local strain layers (usually nitride) and High K Metal Gate stack.
The International Technology Roadmap for Semiconductors predicts the trends in CMOS and other technologies. There is an RF subcommittee which has made predictions about the RF characteristics. This report summarizes some of those projections. The methodology is to develop analytical expressions for RF figures of merit and predict RF performance trends based on the base process characteristics. Comparing the ITRS and the foundry data there are discrepancies. This is not surprising given the introduction of disruptive process innovations such as strain, layout variation, and computational lithographic design rules. This workshop talks about the trends and why there differences between extending analytical expressions and actual foundry data. The workshop concludes with a brief section on passives.




Beyond the Transistor. FET, HBT and FET-HBT mm-Wave Circuit Benchmarking and Scaling

Prof. Sorin P. Voinigescu; University of Toronto, Canada

The presentation will first discuss the measurement, de-embedding and extrapolation techniques used to generate the HF figures of merit in the ITRS tables. Exampels of nanoscale CMOS, FDSOI and SiGe HBT transistors and cascode stages measured up to 325 GHz will be provided. Next, the choice of mm-wave and high-speed benchmark circuits will be addressed along with their predicted performance scaling based on large signal compact models.




Session: WSH

Nanopackaging: Multifunctional nanomaterials and devices towards 3D system miniaturization


Dominique Baillargeat, XLIM UMR 7252 CNRS/Université de Limoges


Fabio Coccetti, CNRS-LAAS


Future nanoelectronics technology will face many challenges to match Moore and more than Moore Predictions. Going to nanometric dimensions needs to overcome limits due to physical phenomena, technological capabilities, packaging and assembly of circuits and system. (Nano)packaging is becoming a major bottleneck and it will play a crucial role for enabling future nanoelectronics to be consistent with future components, system and circuit board (or global level) requirements. In this context, many challenges have to be considered: development of state-of-the-art thermal and interconnect interfaces. development of new thermal and electrical nano-characterization techniques. development of predictive modeling tools based on multi-disciplinary and advanced multi-scales approaches, fabricating and testing of representative demonstrators with significant impact
This WS will considered all this aspects. It is inherently interdisciplinary, and contributors are comprised of experts in complementary research fields and will present intensive research investigations focused on carbon nano-tubes, graphen, 2D materials, nanowires, etc. dedicated to 3D system integration and miniaturization.




Carbon based 3D interconnect technology

Johan Liu1,2; Yifeng Fu3; Di Jiang1; Shuangxi Sun1; Jie Bao2 and Ning Wang21Department of Microtechnology and Nanoscience, Chalmers University of Technology, Sweden, 2SMIT Center, School of Automation and Mechacnical Engineering and Key Laboratory of New Displays and System Integration, Shanghai University, 3SHT Smart High Tech AB, Gothenburg, Sweden

Carbon Nanotubes (CNTs) have excellent electrical, thermal and mechanical properties. They are mechanically strong at nanoscale yet also flexible if made micro- or milli-meter long. They are synthesized from nano-sized catalyst particles and can be made up to millimeters. A lot of research studies have been spent on various properties of the CNTs. They are regarded as an alternative material in a lot of applications such as ICs, MEMS, sensors, biomedical and other composite materials, etc. Among them, the thermally grown CNTs using chemical vapor deposition method is of particular interested in electronics applications as a 3D interconnect material. Within this talk, growth and post-growth processing of CNTs are covered and tailoring of CNTs properties, i.e. electrical resistivity, thermal conductivity and strength, etc., is discussed. To make the electronics systems smaller, faster and more power efficient, CNTs as a potential new material are likely to provide the solution for these future challenges.




Micro-Nano interposer for Molecular electronics and 3D integrated circuits

P. Reynaud; A. Thuaire; X. Baillin; S. Cheramy; G. Poupon; CEA Léti, Grenoble – France

As molecular electronics is getting more and more explored, it becomes necessary to find appropriate nanopackaging solutions. A micro-nano interposer based on silicon nanotechnology is thus developed to allow connection between a molecular circuit and mesoscopic electrodes. This interposer includes nano-to-micro scale interconnections and high density "trough silicon via" (TSV) for 3D integrated circuits.




High Frequency Models for Multilayer Graphene Interconnects

V. Kumar1; Shaloo Rakheja2; and Azad Naeemi1; 1Georgia Institute of Technology, 2MIT

In this talk, a unified approach in capturing quantum mechanical and electromagnetic phenomena will be used to model signal transport in multilayer graphene interconnects. The models will be used to quantify the potential performance of graphene interconnects as possible replacements for copper interconnects in digital and RF applications.




RF Nano Electromechanical Systems (RF NEMS) Based on Vertically Aligned Carbon Nanotubes

A.Ziaei, S. Xavier; Thales R&T, France

We demonstrate a reproducible carbon nanotubes based technology for switching applications (RF NEMS). The final objective is to demonstrate a CNT based switching device working in the range 1-80GHz and fulfilling very demanding requirements: low losses, high isolation, a switching time below 0.1μs, an operation voltage below 30V and high power handling capabilities.




Carbon nanostructures based RF nanopackaging. Application to 3D interconnect

D. Baillargeat1; S. Bila1; P. Coquet2; B.K. Tay2,3; 1XLIM UMR 7252 CNRS/University of Limoges, 2CINTRA UMI 3288 CNRS/NTU/Thales, Singapore, 3SEEE NTU, Singapore

Assembly approaches are moving toward the system-level integration paradigm and new packaging technologies are proposed such as 3D system integration, wafer-level packaging, or electro/optical integration. During the last past years, new approaches have been studied. They consist in the use of new nanomaterials in packaging such as carbon nanotubes (CNTs), nanowires, nanoparticules and graphene.
In this work, we mainly focus on the use of CNTs applied to high frequency interconnect. They are studied and revealed unique physical, electrical and thermal properties, which make them extremely attractive for many applications in the area of nanoelectronics.
In order to help component design, two modeling approaches are proposed: one is based on mesoscopic model for the electromagnetic properties of arrays of nanotubes, the other one on circuit simulation for RF applications. All of them are considering the quantum effects of the CNTs.
Several test structures are considered such as flip-chip report based on CNTs bumps and wireless interconnect based on CNTs monopole. Experimental works are conducted with success. They validate theoretical approaches and specific processes.




Advanced numerical tools for the multiscale-multiphyiscs modelling of carbon-based interconnections

L. Pierantoni1; D. Mencarelli1; F. Coccetti2; 1Università Polietcnica delle Marche, 2LAAS-CNRS France

Full-wave multiphysics techniques aimed at the investigation of the combined electromagnetic-coherent transport phenomena in carbon-based nano-structures/devices have been recently introduced. The quantum transport is modeled by i) discrete Hamiltonians at atomistic scale, ii) Schrödinger equation, and/or Dirac/Dirac-like eqs. at continuous level. In this work, we will analyze: i) electromagnetic-quantum transport modelling and simulation of CNTs interconnections with TS , providing RF equivalent circuits, ii) many-terminal graphene nanoribbon (GNR) circuits, Y- and T- GNR junctions. Moroever, a new interconnection concept is presented. This consists of a resonating wire antenna, radiating very closely to a graphene patch, thus inducing plasmon propagation. In particular, we consider a suspended graphene structure, in order to i) emphasize the intrinsic properties of the material, ii) the changes of propagation characteristics due to a dielectric substrate. The numerical computation is achieved by means of a dedicated MoM technique, and, for comparison, is tentatively addressed by standard full-wave simulators. The proposed configuration is not much dissimilar to use an STM (Scanning Tunneling Microscopy) probe for near field microwave microscopy: in fact, the STM tip can be modeled by a filiform antenna protruding, for instance, from a coaxial feed.




Session: WSI

MmW to THz, which Applications with which Technology


Didier Belot, CEA Leti


Pierre Busson, ST Microelectronics


Millimeter Waves applications are becoming more and more used for civil markets in the infrastructures, automotive, mobile devices connectivity, and imaging domains while THz applications remain manly in the military domain, even if we can notice tentative for civil security and health imaging domain. The Workshop is organized in three levels of complexity: in a first time in order to target applications mentioned above, process technologies has to be defined, and we will have presentations covering SiGe and III-V processes; then we will address modeling issues for millimeter waves and THz frequencies, before having an overview on different design techniques in SiGe and III-V processes addressing mmW and THz applications. At the end of the day, we will have an open door on industrial systems and applications opportunities in Telecommunications infrastructures, mobile devices and connectivity. 




SiGe Technologies for mmW and THz applications

Pascal Chevalier; ST Microelectronics

SiGe BiCMOS technologies in production today address applications such as 77 GHz automotive radar or 100 Gb/s optical communications. They exhibit ~200 GHz fT / ~300 GHz fMAX SiGe HBTs, high-Q millimeter-wave passives and 0.18-µm to 0.13-µm CMOS. Next generations in development today offer SiGe HBTs featuring ~300 GHz fT and fMAX up to 500 GHz, embedded in 55-nm CMOS for the most advanced one. They will improve the performance of current applications but will also pave the way for new low-cost applications above 100 GHz. The talk will review the BiCMOS developments carried out in STMicroelectronics. The vertical and the lateral scaling of the SiGe HBT will be discussed and the outcome of these studies, with respect to the HF performances (fT, fMAX, noise, power), will be presented. Last 0.13-µm and 55-nm BiCMOS platforms (respectively BiCMOS9MW and BiCMOS055) from STMicroelectronics will be presented.




III-V Technologies for mmW and THz applications

Mohamed Zaknoune; IEMN Lille, France

The increasing demand in the market in terms of data rate, speed, mobile devices has created a competition between device technologies. The demand in terms of low noise amplification, power amplification and power generation in the millimeter and sub-millimeter waves range i.e. 100 GHz−1THz is becoming more and more crucial. For these very high frequency applications, III-V transistors such as the Double Heterojunction Bipolar Transistor (DHBT) and the High Electron mobility Transistor (HEMT) or THz photomixer such as Uni-Traveling-Carrier-Photodiode (UTC) are the inevitable devices. During this last decade, immense efforts have been undertaken to push their performances at the limit, and sometimes beyond, of the THz. It will be shown in which ways these performances have been obtained on III-V semiconductors. These different ways include epitaxial design, scaling, interfaces, ohmic contacts.




RF front-ends for mm-Wave and THz application in SiGe/CMOS

Ulrich Pfeiffer; University of Wuppertal

This workshop will present an overview of silicon-based RF front- ends for imaging, radar, and communication applications operating close to and beyond the THz-gap. The presentation will focus on heterodyne and direct detection techniques including a discussion about the available device technologies and the achievable bandwidth and sensitivity. Heterodyne examples include wideband IQ transmitter and receiver front-ends at 240 GHz for data transmission towards 100 Gbit/s, a circular polarized radar transceiver chip at 240 GHz with a range resolution of 3.65 mm, and a THz multi-color imager up to 1 THz. Finally, incoherent SiGe sources with 0dBm up to 1/2 THz and THz video cameras in CMOS and SiGe process technologies operating up to 4THz are discussed.




Multifunctional Circuits and Modules Based on III/V mHEMT Technology for (Sub-)Millimeter-Wave Applications in Space, Communication and Sensing

Michael Schlechtweg; Fraunhofer Institute

The transmission of electromagnetic waves in the atmosphere features local maxima in the distinguished frequency bands around 94, 140, 220, 340, 410, 480, 660, and 850 GHz, making them especially attractive for millimeter-wave high-speed data links and long-distance high-resolution radar and imaging systems. High operating frequencies allow for precise geometrical resolution due to high absolute bandwidth and small wavelength. It also reduces the size of components and antennas, predestining them for lightweight airborne systems, e.g. in unmanned aerial vehicles (UAVs). In comparison to visible and infrared radiation, a particular benefit of millimeter-waves for imaging and sensing applications is the penetration of dust, fog, rain, snow, and textiles.
The workshop presentation covers a broad variety of MMICs and modules developed at the Fraunhofer IAF for manifold applications in the frequency range up to 600 GHz and above, using the advanced metamorphic high electron mobility transistor (mHEMT) technology based on the InGaAs/InAlAs material system on 4" GaAs substrates. To achieve very high MMIC operating frequencies, the transit frequency of transistors was boosted to over 600 GHz by increasing the indium content in the transistor channel up to 100 % and reducing the gate length to 20 nm. The presented MMICs act as key components in wireless communication systems (radio links, mobile communication, satellite transmission), sensor systems (collision avoidance radar, atmospheric sensors, non-destructive materials testing), radio astronomic sensors (cryogenic ultra-low-noise amplifiers), and in military engineering (high-resolution radar, passive imaging of the environment).
The presentation will specifically address a variety of high-performance MMICs, such as ultra-low-noise amplifiers mixers, oscillators, switches, frequency dividers, frequency multipliers, transmitters, receivers, as well as complete transmit/receive and radar circuits. Different approaches for module packaging and system realization will be also covered. As an example, multifunctional transmitter and receiver chip sets for millimeter-wave high-speed data links and active imaging systems up to 350 GHz will be discussed.




Towards the integration of millimeter wave access points in future 5G heterogeneous networks: stakes, challenges, and key enabling technologies

Cedric Dehos; CEA Leti

 The exponential increase of mobile data traffic, driven by smartphone and tablets, requires disrupting approaches in the definition of the future 5G network. The trend is to reduce the cell size and offload a great part of this traffic to small cell access points, optically or wirelessly linked together and backhauled to the core network. In this scope the huge frequency bands available at millimeter wave should be good candidates for opportunistic high data rate data transfer.
Within this talk, an heterogeneous network infrastructure is proposed based on the superimposing of millimeter wave access point and backhaul to the former cellular infrastructure. The latest breakthrough in CMOS and BiCMOS technologies and in industrial packaging are pointed out as starting point for the system definition and feasibility study of such mmw devices at low cost. A focus is next made on the access point architecture and design, through the framework of the H2020 Miwaves project. At least the technical, sociological, and economical challenge of such a mmw deployment is also emphasized and tackled.




Indoor WiGig and WiFi Convergence applications

Ali Sadri; Reza Arefi; Joongheon Kim;Intel

Increasing the capacity of cellular networks is becoming one of the most challenging tasks of the mobile industry this decade. As traditional mechanisms to increase spectral efficiency approach their theoretical limits, new and disruptive techniques are needed to satisfy the growing demand of mobile data traffic. While considerable focus has been rightfully put into exploiting licensed frequency bands below 6 GHz, the vast amount of licensed frequency spectrum in millimeter wave (mmWave) bands has seen little use by cellular systems despite holding far greater potential for enhancing capacity. Besides mobile cellular access, backhaul access technologies actively utilize mmWave frequency bands to satisfy multi-gigabit/s data rate requirements. In this paper we introduce our novel architecture for mmWave capable mobile cellular and backhaul access technologies with modular antenna arrays. This architecture makes use of various network RF components including combined with the use of mmWave based technologies for the backhaul, fronthaul and mobile cellular access. We show that our mmWave RF systems can significantly increase capacity and density for next generation backhaul and mobile cellular access systems.




Silicon mmW and THz Applications

Ali Hajimiri; CalTech

Over the last decade, there has been an explosion of newly reported result in the areas of integrated mm-wave and THz signal generation and detection. These new frequencies of operation enable a large number of new applications and architectures. In this talk, we will focus on several newly enable solution to such system, such as novel on-chip multi-port driven radiators, dynamic polarization control of the radiated signals, and integrated electro-optical signal generation solutions. We will discuss the underlying theme behind all these approaches and the future potential of such systems through several practical examples.




Coherent THz frequency synthesis in Silicon technologies: design challenges and impacts.

Alexandre Siligaris; CEA Leti

Sub-mmW frequency band is gaining an increased interest among the scientific community for RF system development. Indeed, within the J-band (220-325 GHz) a large spectrum is available where various applications are developed like short range radar, THz imaging, chip-to-chip high throughput communications or backhaul communications. Such systems are mostly based on heterodyne or super-heterodyne architecture in which a stable and low phase-noise local oscillator must provide a reference frequency for up and down conversion. Lots of work has been recently published on local oscillators operating around 300 GHz. However, either the oscillators are not included in PLLs, or their PLLs operate at high frequency, which is constraining in terms of design, performance and power consumption.
Here we present some architecture and design approaches that help to implement very high frequency synthesizers with low phase noise and optimal power consumption in Silicon technologies. The design challenges are identified and treated. Some examples of implemented circuits are detailed and the impact of phase noise is shown on THz images performed with heterodyne receivers.




Session: WSJ

Modern radar systems for high resolution ranging, indoor localization, and vital signs detection


Aly E. Fathy, University of Tennessee, Knoxville 


Jenshan Lin, University of Florida 


In recent few years, radar has evolved from an important military utility to popular solution for automobile collision avoidance, indoor localization, noncontact health monitoring, and motion detection/control. Both the industry and academia are working diligently in making radar portable intelligent devices for civilian applications closely related to human life. This workshop presents some of the recent developments on ultra-wideband (UWB), Doppler, frequency-modulated continuous-wave (FMCW), and injection-locking radars for biomedical and localization applications. The technologies presented operate in a broad frequency range from a few hundreds of MHz to above 200 GHz, with detection range from a few mms to hundreds of meters and range resolution as high as μm-scale. Special emphasis of this workshop is dedicated to hardware solutions at both the circuit and system levels. Low-power, low cost, high sensitivity/resolution, and smart control are some of the distinguished themes that make the presented radar a brand new concept compared with that in several decades ago. 




Resolution and Precision in Vital-Sign-Monitoring LFMCW Radars

Roberto Gomez-Gacia; José-María Muñoz-Ferreras; University of Alcala, Spain

Radars have demonstrated to be interesting equipments for non-military indoor applications. In particular, the detection and tracking of vital signs (e.g., respiration and heartbeats) are highly-appealing tasks for healthcare scenarios. Furthermore, these short-range radar systems can also be applied to detect the presence of people after the occurrence of catastrophes, such as snow avalanches or earthquakes.

The radars based on coherent linear-frequency-modulated continuous-wave (LFMCW) signals have emerged as low-cost systems with unique features, such as the combination of high range resolution and tracking precision. These inexpensive systems are based on the so-called deramping technique, which enables the simplification of the acquisition block, which can employ a low-end Analog-to-Digital Converter (ADC) with a small sampling frequency.

In this lecture, the main features of an LFMCW radar for monitoring of vital signs are briefly expounded. Special emphasis is made on the concepts of range resolution and precision, which usually lead to confusion. Range resolution is related to the ability of the radar to discriminate between different targets located at close ranges, whereas range precision is the ability of the radar to mark the absolute range position of an isolated target. A finer range resolution only requires a larger instantaneous transmitted bandwidth, whereas a better precision implies a higher signal-to-noise ratio (SNR).

Simulations and experimental results coming from moving metal plates and breathing subjects allow to emphasize the main aspects of this lecture.




Review of Non-Contact Measurements of Vital Signs using Various Types of Radars and Algorithms

Aly E Fathy1; Lingyun Ren1; Krishna Naishadham2; Jean E. Piou3; Paul Theilmann4; 1University of Tennessee, Knoxville, TN, USA, 2Georgia Institute of Technology, Atlanta, GA, USA. 3MIT Lincoln Laboratory, Lexington, MA, USA, 4MaXentric Technologies, San Diego, CA, USA.

Cardiac and respiratory motion of the chest cavity, crucial to vital sign detection. We have developed different types of radars including UWB and Stepped Frequency Continuous Wave (SFCW) radar to remotely detect both. Previous attempts were successful in detecting respiration rate but had problems in accurately identifying heart rate due to its low amplitude, presence on harmonics and intermodulation components. We have been working on developing new algorithms to accurately extract cardiac and respiration rates. The method has been applied to various radar measurements on a sedentary object without producing harmonics and inter-modulation products that plague signal resolution in commonly used auto- correlated FFT spectrograms relying on peak detection, and its results are very encouraging. Emphasis will be on UWB radar for its capability to track more than one person.




RFIC integration of CW radar transceivers for vibration and vital sign detection

Changzhi Li1; Jenshan Lin2; 1Texas Tech University, USA,  2University of Florida, USA

This presentation reviews the development of continuous-wave (CW) non-contact motion sensor chips for vibration and vital sign detection. The first chip was developed at Bell Labs during 2000-2002. The research that led to this first demonstration is described. Since then, several different approaches have been taken to improve the performance and to explore potential military and commercial applications. Different radar architectures have been employed in CMOS RF system-on-chip from a few GHz to millimeter-wave frequencies. The non-contact sensor chips that can detect physiological motions of humans and animals from a distance away will find a variety of applications including healthcare, security, emergency response, etc. A few examples of applications and their potential impacts to our society are discussed.




Doppler Radar for Sleep Medicine

Victor Lubecke; Olga Boric-Lubecke; University of Hawaii, USA

Obstructive Sleep Apnea (OSA) is a common sleep disorder, estimated to affect over 40 million US patients. Accurate screening and diagnosis is necessary to lessen the burden of this disorder on patients, their families, and the community. The current gold standard for diagnosis of OSA uses conventional sensors that contact the patient. These contacts and their associated wires negatively impact the patient's quality of sleep. New non-contact physiologic radar monitoring is emerging, which allows for unique non-invasive wireless monitoring of some of the classic sleep variables. Such systems measure respiration and heart rate, chest wall and abdominal motion, and patient activity, and provide diagnostic analysis. A discussion of the utility of Doppler radar measurements in sleep medicine will be presented, including the development of effective automated indicators sensitive to indications of apnea and hypopnea events.




Development of a Low Power UWB Radar interface for Sensor Nodes

Dieter Genschow; Innovations for High Performance Microelectronics, Germany

The key element of the commonly proclamated age of internet of things are small computing entities that interface the physical world to the digitally connected world. The spectrum of physical phenomena of interest is broad, but a very common application is to sense some sort of motion, distance, frequency, vibration or other forms of displacement. Radar sensors have become widely used in that area in the recent years, because of their numerous advantages over technologies like light barriers, PIR sensors, ultrasonic transducers and video cameras.

Unfortunately, problems still arise when Radar sensors shall be connected to battery supplied sensor nodes. Power consumption of current radar devices is much too high for small battery powered devices if higher update rates are needed. (FM)CW sensors have low requirements on the analog to digital conversion but need to transmit for long time intervals, which increases average power consumption.
Pulse or UWB

Radars need little energy to transmit a signal but pose very high demands on the conversion from time to digital domain, which dramatically increases power consumption. This is especially true for devices that sense short distances i.e. have extremely small round trip times.

Impulse Radio Radars with small power requirements exist but they have very low update rates and need a lot of processing between samples.

This talk presents a novel low power interface architecture to measure round trip times in the range from nanoseconds to milliseconds with picosecond resolution. The goal of this development is an interface that connects pulsed sensors with time-coded information (UWB,Impulse Radio, LIDAR or Ultrasonic) to low power microcontrollers with slow clock rates, ADC and little processing power. The current state of development will be shown and pro's and con's of the system will be discussed.




Wireless Indoor Positioning Systems based on Radar Technology

Chia-Chan Chang; National Chung-Cheng University, Taiwan

Numerous applications require the ability to localize/track human subjects either for security or safety issues. Examples include disaster search-and-rescue, law enforcement, urban warfare, and more recently elderly care in nursing homes or living households due to the rapid increase of the global aging population.
This presentation discusses a series of 2-D indoor positioning systems developed by our group using various types of radar technique and algorithms. The first continuous-wave positioning system is composed of two phased antenna arrays, while the human target position is determined based on the AoA algorithm. The FMCW technique is later applied in the second system to further give the range information. In both systems, the users need to carry an active tag to communicate with tracking readers. As a last discussion, a tag-free 2-D wireless positioning system will be introduced, where the human presence is based on the detection of the respiratory signals.




Indoor Vital-Sign and Gesture Sensors Using WiFi Passive Transponder Technology

Tzyy-Sheng Horng; National Sun Yat-Sen University, Taiwan

This presentation demonstrates a passive transponder to detect human vital signs and gestures with WiFi signals in an indoor environment. The proposed transponder does not contain a transmitting source inside the transponder. Instead, the transponder captures WiFi signals produced by an access point and utilizes those signals to perform vital-sign monitoring and gesture sensing according to Doppler effects. The range of detection depends on the various standards of WiFi including 802.11 b/g/n, and will be discussed intensively in the Workshop.




Millimeter Wave Radar Imaging for Security and Industrial Applications

Nils Pohl; Dirk Nüßler; Fraunhofer FHR, Germany

Nowadays, modern semiconductor technologies allow to highly-integrate multi-channel Radar sensors in the mmWave regime at moderate cost level, which enables imaging sensors in transmission or reflection setups. Therefore, a new technology for object detection and material classification in industrial process environments (in-line), as well as for security purposes is around the corner. Due to the demands for high spatial resolution, frequencies around 100 GHz and even higher are mandatory, which is still a challenging task for cost-efficient technologies.
This contribution addresses the underlying circuit technologies as well as the application environments. On circuit level, sensor concepts up to 240 GHz for radar operation will be presented and finally various application examples of microwave imaging for solving real problems in the field of plastic recycling, security envelope scanning and in inline production environments will be given.


Wireless Radar Sensor Networks for Real-Time Health Monitoring

Dominique Schreurs; Katholieke Universiteit (KU) Leuven, Belgium

Radar technologies are emerging for health monitoring at home. The possibility of characterizing speed and distance in a contactless way opens up a range of practical applications, allowing elderly to reside longer in their familiar environment. Research has been focusing at first at single radar solutions targeting mainly vital signs monitoring and detection of falls. To increase flexibility and to overcome obstructions such as furniture, recent developments evolve towards wireless radar sensor networks. In this presentation, an overview on the state-of-art will be provided, highlighting the challenges to overcome when combining wireless communications with multi-functional radar sensing, while guaranteeing real-time data analysis results.


Introduction in High-Resolution and Ultra-Low Power Distance Measurements by Microwave Interferometry

Alexander Koelpin; University of Erlangen-Nuremberg, Germany

Many civilian measurement applications can be realized by microwave interferometry. This radar architecture features low hardware and software complexity and can be optimized for highest distance resolutions in the micrometer regime combined with a measurement value update rate of several kilohertz or ultra-low power operation for, e.g., presence detection. Both approaches will be discussed in this talk. After introducing the basic technology and dependencies a detailed introduction to real hardware building blocks for the K band will be given. Also non-ideal effects and approaches for calibrating the system will be given. The talk will close with real world applications spreading from simple presence detection to precise distance measurements, vibration analysis and frequency determination.




Session: WSK

RF system miniaturization with Integrated-passive-Device (IPD), Through-silicon-via (TSV), and System-in-Package (SiP) Technologies


Feng Ling, Xpeedic Technology, Inc.


Nozad Karim, Amkor


Designing multiband, multimode mobile devices poses a great challenge to RF designers. RF front end must move away from the traditional discrete analog component chains to highly integrated one, which not only provides reduced power consumption and improved radio performance while keeping smaller footprint, but also makes the system design more simplified and cost-effective. Integrated passive device (IPD), through silicon via (TSV), and system in package (SiP) have become the key enabling technologies. IPD allows the discrete passive components around the transceiver to be integrated into blocks, which can be further integrated with active ICs into a system-in-package. TSV can be incorporated with IPD to provide better flexibility and form factor. The workshop assembles a group of well recognized experts covering the entire RF ecosystem from IPD/TSV/Package foundries, design houses, to EDA tool vendors, to share with the attendees their approach for RF front end miniaturization.




Overview of IPD Applications in RF Front End Module Designs

Weimin Sun1 and Hilal Ezzeddine21Skyworks Solutions, Inc., 2STMicroelectronics

The Integrated passive device (IPD) has seen increasing use in RF and wireless Front-End Module (FEM) and other System-in-Package (SiP) designs. The IPD process is different than common Si CMOS processes in order to facilitate high-Q for passive devices, but can leverage state of the art Si IC process technologies. More importantly, IPD can allow more compact and 3D designs in RF modules with comparable performance, better tolerance and lower cost than traditional discrete designs. In this presentation, we will review and compare several available IPD processes which have been used in RFIC module applications. Such RF applications include but are not limited to filters, couplers, baluns, transformers, impedance matching networks and power combiners. In addition, we will discuss practical IPD design flows and techniques, in particular, EM design tools that can be effectively integrated into design flows to optimize the design and reduce design cycle time. It has been seen that the general correlation between EM enabled IPD design simulation and RF measurement is excellent. In the end, we will present and discuss several IPD design and simulation examples in RF FEM applications.




RF IPD Design for Vertical Integration in Wireless Systems

Kim Eilert; Charles Hoggatt; Ki Shin; Neal Mellen; ON Semiconductor

Thin film Integrated Passive Device (IPD) technologies have long offered a miniaturized alternative to traditional discrete and ceramic solutions. With the advantage that precision processing and low-profile form factor offer, copper on silicon wafer based IPD in particular results in good performance at comparatively low cost. This technology, especially with high-performance thick copper, has been adopted by the market and is visible today in many cellphones as RF filters and matching networks.
The development of Through Silicon Via (TSV) processing capability adds a new dimension to the existing IPD process suite. While 2.5D interposer products are desirable in numerous applications, the synergy of TSV and IPD enables true 3D interposers with RF functionality. This talk will examine the implications of TSV + IPD, and examine new design possibilities as well as the benefits and challenges of vertical integration.




RF System-in-Package using IPD Made on Silicon Substrate

Kai Liu; STATS ChipPAC

Mobile applications require electronic devices made in small form-factor and low profile, and Moore's law has been witnessed in successful adoptions of finer and finer semiconductor features for such applications. However, most advances of using advanced silicon node are mainly for active devices. Passive devices do not follow Moore's law and still undergo size and performance trade-off battles. In an RF package, 70%-80% area is occupied by passive devices, such as discrete RCL components, functional blocks (filter, balun, matching, etc). Therefore, reduction of the area for passive devices makes a vital impact on overall package size. Integrated Passive Device (IPD) made from silicon process has unique features, such as less process-variation (therefore better yield), smaller form-factor and lower profile. However to make IPD really work with size constrains, careful IPD designs through sophisticated skills are needed in order to achieve good electrical performance. These designs often take into account of impact from packaging environment where these IPDs are to be used, which is sometimes called IPD (die) and package co-design. In this workshop, several application cases are provided to demonstrate how to meet size and performance specifications required for respective wireless applications.




SiP Packaging Solutions for System Integration and Miniaturization

Nozad Karim; Amkor Technology

System integration is driving and influencing performance improvements, miniaturization, and cost reduction in new electronic products. Device and package design is expanding to incorporate a variety of design and manufacturing methods to achieve size reduction and increase circuit functionality within a System-in-Package (SiP) platform.
A System-in-Package is primarily comprised of several subsystems performing different functions. System and subsystem integration within a package can take advantage of flexible and compact component placement, isolation requirements, and short interconnection pathways. Advanced and mature technologies are combined to leverage placement of Integrated Passive Devices (IPD) and embedded active and passive devices placed in a substrate. Through Silicon Vias (TSV), stacked and side-by-side devices can be connected by flip chip, wire bond or a combination of both technologies. Isolation in the form of conformal shielding, compartmental shielding, or double sided assembly is available. Creative designs are used to produce competitive packaging solutions.
Functional blocks such as impedance matching, filters, baluns and other circuits can be realized by IPD technology on silicon or glass. Embedded active and passive components in a substrate allow additional package miniaturization by moving active devices and passive components from the top and bottom layers of the substrate to the core of the substrate. Embedded technology in a substrate exhibits good electrical and thermal behaviors. Mobile, IoT and wearable electronics require operating at multiple frequencies at different frequency bands. Operation at multiple frequencies within a band can create intermodulation and harmonics which produce electromagnetic interference impacting SiP performance and the surrounding electronic circuits. Shielding becomes essential to protect the system from degradation. Sputter shielding is one solution used to control electromagnetic radiation and susceptibility.
Proven SiP design methodology and manufacturing know how guarantees a system integration solution by using a mixture of diverse technologies that have already been demonstrated in mass production.




Design Methodology for Efficient IPD Designing/Prototyping

Feng Ling; Xpeedic Technology, Inc.

Demand for mobile communication and instant access to information has driven the growth of the portable devices at unprecedented speed. RF front end must move away from the traditional discrete analog component chains to highly integrated one, which not only provides reduced power consumption and improved radio performance while keeping smaller footprint, but also makes the system design more simplified and cost-effective. Silicon based integrated passive device (IPD) allows the discrete passive components around the transceiver to be integrated into blocks. Furthermore, IPD can be integrated with active ICs into a system-in-package (SiP) to make the system more integrated. This approach has tremendous application potential because of its advantages such as heterogeneous functional integration, miniaturization, performance, cost, flexibility, and testability. However, such a complicated system poses a great challenges to the existing design flow which is more adaptive to the system with discrete components. New design methodology and flow has to be developed to help to reduce the design iterations and achieve the first pass success. In the talk, such design flow with focus on pre-layout schematic level synthesis, post-layout fast EM modeling and simulation, fast tuning, and IC-package co-simulation will be presented with several application examples.




Design Challenges: Embedding bare die and discrete devices in a system in package (SiP)

P. Viklund; C. Pfeil and R. Myers; Mentor Graphics Corp., Skurup, Sweden

An advanced process called Embedded Component Package (ECP®) has been developed by AT&S, which allows embedding bare die and discrete passives into the core of a package substrate. Components are attached with an adhesive and connectivity is established by plating feedthrus (vias) that span the signal layers to die pins. This solder-less process can be applied to create advanced system in packages (SiP).
This technology provides a number of benefits such as miniaturization, improved electrical performance and thermal management, improved reliability and mechanical stability, and cost-efficiency; however, it presents significant challenges to the design process and for the creation and management of new data.
Embedding active components in the core of an organic substrate is an unusual method for SiP assembly and fabrication. AT&S has worked with Mentor Graphics to develop a streamlined design workflow, which includes a suite of integrated software tools that significantly improve the time to completion, and properly represent the components for design, simulation, assembly and fabrication.
The design consists of embedded PMIC and LDD array die along with a set of capacitors embedded in the substrate core. The Logic and Memory chips are mounted on the top surface of the substrate as stacked die using wire bond attachment along with a flip-chip device. The SiP is integrated on a 366-pin ball grid array platform.




RF system SIP integration: how to enhance signal integrity concerns by use of high value SiCaps with ultra low ESL

O. Gaborieau; M. Heise; IPDiA, Caen, France

SiCaps inherently have low ESL values and by use of IPDiA's unique trench cap technology optimized for even lower inductance the design engineer can now chose cap values of nF and even low uF to facilitate decoupling function inside the SIP. The silicon die can be laid out to accommodate multiple cap values and even include resistance values of up to some mOhms.
Having designed a SiCap die for integration into your SIP it can of course be attached with wirebonds or alternatively bumped with or without copper pillars and outfitted even with through silicon vias for ease of integration. The availability of ultra low profile of these SiCap dies ranging between and minimum of 30 to 80 micrometers and an identical CTE-match with the active dies facilitate size reductions further.




Session: WSL

Wearable Electronics with Microwaves


Debabani Choudhury, Intel Corporation


J.-C. Chiao, UT Arlington


Wearable electronics utilizing RF and microwave technologies are emerging quickly in wide ranges of applications in medicine, consumer electronics, gaming, ecology monitoring, social networking, smart transportation, environment and weather monitoring, automatic manufacturing and safety/security. Examples include continuous non-invasive vital-signal measurements, wireless positioning and localization, implantable and wearable devices for in vivo and ex vivo monitoring of human physiological conditions, remotely-located sensors and omnipresent sensors for Internet of Things. Presentations from eight experts in this workshop discuss the state-of-the-art status, technical challenges in designs, fabrication and implementation, and emerging applications/markets of wearable electronics that enabled by RF and microwave technologies. The goal of this workshop is to facilitate interaction among attendees and inspire innovative ideas.




Wearable Devices utilizing Microwaves

J.-C. Chiao; University of Texas at Arlington

Wireless communication has created a fundamental change in our daily lives owing to the convenience, affordability and networking capability. Emerging technologies further enhance the capability into applications for sensing, monitoring and even therapeutic treatment. Wearable devices, either for human uses or monitoring environments, utilizing microwaves for these applications face new technical challenges in designs, materials, integration and networking. In this review, we will discuss the status of wearable devices that implement RF/microwave technologies and ideas of their applications for Internet of Things. Power density, safety, implementation issues, and system challenges will also be discussed.




Radar Techniques for Wireless Indoor Positioning

Sheng-Fuh Chang; National Chung Cheng University

Growing interest of elderly healthcare in private and public sectors has drawn intensive development on wearable bio-devices. In this lecture, a wearable radar is developed with integrated functions of breath and heart-beat rate detection and movement trajectory of multiple subjects in a room or public area. The breath and heart-beat rates are non-invasively detected based on the Doppler effect of the induced micro-vibration of the chest skin. The subject position is identified based on the angle of arrival principle. The system consists of a vital Doppler sensor, wireless data transceiver, and a microprocessor. It is implemented in a badge form factor for use convenience. Experimental tests in a furnished room will be demonstrated in this workshop.




Miniature Near-field Radar Sensing Technology for Wearable Applications

Hong-Dun Lin; Taiwan Industrial Technology Research Institute

In recent years there has been increasing interest in wearable health monitoring devices, both in research and industry. Continuous monitoring of these vital signs can help identify a patient's risk for stroke, heart attack, heart failure, arterial aneurysm, and renal failure. These devices are particularly important to the world's increasingly aging population, whose health has to be assessed daily monitored continuously. Currently, physiological monitoring devices for hospital used have been developed recently in either commercial market or academic field for clinical applications. There are a number of health issues whose treatment benefits from continuous vital sign monitoring. Traditionally, when this approach is deemed necessary, it results in the clinical applications of the patient, with expensive equipment and medical personnel on hand; in some cases, the patient may remain at home, but the use of bulky and expensive equipment remains. Many of sensing techniques have been applied on basic physiological signal detection for clinical diagnosis and home healthcare. Most known maturely developed sensing methods (EEG/ECG/EMG/Temperature/BP etc. al.) replied on contact way to obtain desired physiological information for further data analysis. However, those methods might cause some inconvenient and uncomfortable problems, and not easy to be used for home healthcare and personal physiological analysis. To improve this issue, a novel technology based on low power radar technology based on low radio-frequency was proposed to detect humans' pulse signal by the non-contact way for heartbeat/respiration/blood pressure signal measurement. By this technique, the dynamic body physical motion activity can be easily detected and also revealed in real-time. For the prospective development, integration of all functions, including sensing, signal processing and wireless data transmission, into a dedicated system can be helpful to provide more significant diagnosis information in routine health condition examination. The sensing technology performs a professional but easy-to-use device for physiological information measurement. The flexible sensor operates using low-power radar, alone with a handheld device for tele-monitoring. It provides user a simple way to monitor personal health for broadly clinical and homecare applications.




Wearable Wireless Sensors for Seizure Detection and Alert Systems

Eric Chow; Cyberonics, Inc.

The ProGuardianTM System, developed by Cyberonics, comprises of primarily a wireless wearable monitoring patch that monitors for cardiac or movement based seizure events during periods of sleep for people with epilepsy. The wearable patch communicates wirelessly, up to 30 ft, with a base-station hub via Bluetooth Low Energy. The base station notification range is extended throughout a WiFi enabled home via the Caregiver app on an Android Smartphone. All notifications and seizure events will be logged and available as reports. Cyberonics also develops a Class III medical implantable neurostimulator which activates the vagus nerve for treatment of seizures in patients with epilepsy. Cyberonics has a far-field RF-wireless version of the device, currently in development, which interfaces with a wireless tablet programmer. In the future, all these components can communicate with each other wirelessly as well as interface with broader wireless networks and the cloud. Wireless integration of the implantable therapy device with external wearable sensors, such as ProGuardian, may help improve the overall treatment of epilepsy and other indications.




Wearable Sensor System for Monitoring Body Kinematics

Victor Lubecke; University of Hawaii

Existing solutions rely on camera based systems with line-of-sight limitations resulting in confined measurements or rely on Inertial Measurement Units (IMUs) which are prone to noise and drift, resulting in position inaccuracies. The objective of this investigation is to evaluate and demonstrate the feasibility of producing a wearable sensor system to monitor human body kinematics in real-time. We developed a wearable sensor system based on sensor fusion of real-time measurements using Radio Frequency (RF) positioning sensors combined with MEMS based IMU sensors. The combined sensors provide performance advantages over that of a single sensor, e.g. the RF derived position information can compensate for the IMU drift. The self contained sensor network has military and commercial applications ranging from military training, virtual reality gaming, sports performance monitoring and physical therapy rehabilitation monitoring.




Wearable Wireless Zero-Power Sensors Utilizing Additive Manufacturing Techniques

Manos Tentzeris; Georgia Institute of Technology

Nanotechnology and Inkjet-printed flexible electronics and sensors fabricated on paper, plastic and other polymer substrates are introduced as a sustainable ultra-low-cost solution for the first wearable paradigms of Internet of Things, "Smart Skins" and "Zero-Power" applications. The talk will cover examples from UHF up to the millimeter-wave frequency ranges, while it will include the state of the art of fully-integrated wireless sensor modules on paper, fabrics or flexible polymers and show the first ever 2D sensor integration with an RFID tag module on paper, as well as numerous 3D multilayer paper-based and LCP(Liquid Crystal Polymer)-based RF/microwave structures, that could potentially set the foundation for the truly convergent wearable wireless sensor ad-hoc networks of the future with enhanced cognitive intelligence and "zero-power" operability through ambient energy harvesting and wireless power transfer. Examples from wearable (e.g. bio-monitoring) antennas and RF modules will be reported, as well as the integration of inkjet-printed nanotechnology-based sensors on paper and organic substrates. The talk will also present challenges for inkjet-printed high-complexity modules as well as future directions in the area of environmentally-friendly ("green") RF electronics and "smart-clothes" conformal sensors.




Challenges of Wireless Technologies for Wearable Electronics

Gernot Hueber; NXP Semiconductors

In the past years wearable computers, which are small electronic devices worn by the user, enable the user to mobile computing and wireless networking anywhere and anytime.
Due to the complex wireless wearable communication system wearable electronics have drawn more and more attention by the RF community.
The design of such systems, a device must satisfy challenging though important requirements: it has to be small in size, cost efficient, and it needs to be ultra-low-power consumption to extend lifetime of batteries, reducing the cost of battery exchanges, charging, or going even beyond by using energy harvesting. These criteria put tremendous challenge on the system design, from circuit design in low voltage domain, and especially on the communication part.
In this talk we will present wireless technologies suitable like e.g., BT-LE, NFC, RFID, etc. and discuss their advantages and disadvantages for wearables.




Session: WSM

Current Trends in GaN PA Packaging


Dr. Kamal K. Samanta, Milmega/AMETEK Ltd, Ryde, England


Mr. Paul Garland, Kyocera America Inc, USA


Emerging applications of RF/MW frequencies demand more and more linear power with ever greater efficiency, frequency and bandwidth, and at a low cost and light weight. The attractive material properties of GaN make GaN-HEMT a superior candidate to meet these demanding requirements, and enables GaN for delivering highest level of power density. However, GaN transistors, owning to much smaller footprint than a similar power GaAs-PA, are thermally limited much below the electrical capability of the devices. As a result, the key issue for the next generation high power GaN PA is to effectively dissipate the ultra-high heat flux, generated at the micro-scale gate fingers, using efficient and novel packaging and thermal management techniques. To address this challenge, recently, there is huge research interest which has been investigating and developing various novel materials (including thermal interfacing and CTE compliance materials), heat spreader, process and integration and packaging techniques.
This very timely workshop will attribute a wide range of presentations, highlighting the current status, the latest trends and future challenges on packaging and thermal management, enabling GaN devices to operate with high performance and reliability. While newly developed metal-ceramic air cavity packages have been providing reliable and repeatable performance with high heat dissipation, plastic over-molded parts offer low cost and light weight solutions, and hybrid/module level packaging offers optimum application specific and wideband performance. Further, a special emphasis would be giving on the recent advances in plastic packaging which have enabled higher power dissipation of the device while maintaining a low cost approach towards the materials as well as assembling techniques. This utilizes innovative high temp compound plastic, epoxy and TIM materials to design techniques which enable plastic-packaged GaN devices for maintaining excellent power densities and high efficiencies. At the same time, the workshop will aware the participants with the state-of –the art developments in the other packaging technologies with example of packages and their relative merits and applications.




High Power Plastic Packaging with GaN

Mr. Quinn Martin; MACOM Technology Solutions, USA

For many years high power RF packaging has been dominated by metal and ceramic package construction and assembly processes, with GaN being no exception to this trend. The resulting products have been reliable, consistent, and capable of dissipating heat out of the device. However, the material and assembly costs have been very high and throughput limited. Plastic overmolded parts, on the other hand, can be made at a fraction of the cost but have historically been limited to lower power applications and not considered seriously for high power GaN.
Recent advances in plastic packaging have enabled higher power dissipation of the device while still maintaining a low cost approach to the materials and assembly processes. This has been achieved through package design, material selection, and process optimization. This paper will show examples of packages that use these different aspects to overcome historical shortcomings of plastic packaging and enable high power GaN devices to operate with good performance and high reliability in plastic packages.




Integrated Cu Heat Spreader Package with Hermetic Potential for GaN Applications

Mr. Mark Eblen; Kyocera America Inc, USA

High power Gallium Nitride (GaN) device thermal dissipation has rapidly become a limiting factor for conventional ceramic microelectronic packaging. As liquid cooling is still not fully established at the discrete packaging level, new high thermal conductivity materials are being developed to replace the current CTE controlled metal matrix composite heat spreaders. A particularly attractive solution seeks to integrate a low-cost copper heat spreader into a reliable, hermetic, air-cavity ceramic package. This workshop will cover the design methodology and subsequent reliability testing used in developing this style of package for the GaN market. It will also be shown how Kyocera utilizes simulation tools such as the finite element method to significantly decrease package development time. The author will also briefly cover other low thermal resistance ceramic packaging and assembly solutions targeting this market.




Packaging of Wideband High Power GaN Amplifiers

Dr Kamal K Samanta; Milmega/AMETEK, Ryde, England

Many advanced applications, such as EW and EMC, demand ever greater power over an ultra-wide band (octave or more), within a small size and with high reliability and long life. These leading to incorporation of precise bias/temperature control circuits, integrated closed to the RF circuits. In addition, high electromagnetic field enhances inter-circuit coupling, including that between RF and DC/control, which significantly influence the performance of a high power GaN PA.
A packaged transistor offers several advantages over a bare-die, but suffers from the package parasitic which may adversely affect wideband performance, especially towards the higher band edge. Therefore, for ultra-wideband, very high power GaN-based circuits, efficient hybrid or module level packaging are extremely important. This presentation will report the new hybrid/module level packaging challenges and advanced developments for ultra-wideband (octave bandwidth) and very high power GaN PA modules, delivering power from tens of Watts to 1 KW (CW). The practical effect of packaging lid, isolation walls and RF leakage (to digital/control circuits) on RF performance would be discussed in details with real-world examples and solutions. Furthermore, the talk will highlight the die-based assembling and packaging techniques adopted for optimizing the BW, compactness, performance and most importantly the reliability of amplifier modules, delivering CW power of 100s of Watts at S- and C-bands.




Advances in GaN packaging for low cost applications

Chris Hermanson; Cree Inc, USA

As GaN continues its rapid adoption into mainstream, telecommunications-based, systems the need for low cost packaging has become a key technology area of much interest. In this workshop we will present the results of our low cost package development activities encompassing both ceramic and over-mold plastic technologies, at the component level. The importance of maintaining the RF performance features of GaN will be addressed. The need for superior thermal management will be presented. The future directions of low cost RF packaging will also be addressed in the context of the continually changing requirements of new product development activities.




GaN: A strategic move from hybrid devices to plastic packages

P. Alléaume; M. Camiade; D. Floriot; P. Sin, T. Barbier, D. Bouw; E. Byk; G. Mouginot; Z. Ouarch; C. Auvinet; United Monolithic Semiconductors, Villebon-sur-Yvette, France

Power amplifiers and more generally power functions are basically considered as the most expensive and critical ones in the RF and microwave applications. Knowing the limitations to decrease the price of the semiconductor in the system, packaging developments associated to the power functions are becoming decisive in the success of the power system. In this presentation, we will illustrate the progressive move from bare dies and hybrids RF modules to metal ceramic and more recently to plastic packages. We will also detail the new packaging challenges which are appearing with the introduction of the GaN technology where the power density in comparison with GaAs technologies is multiplied by more than five. Indeed, thanks to several new technologies like power PCBs and high thermal die-attaches, the tradeoff between cost and power dissipation leads to reconsider the advantages of the flange power packages versus their low cost plastic SMD variants which also operate at higher frequency.




Session: WSN

Technologies for Tunable and Reconfigurable RF/Microwave Filters


Domine Leenaerts, NXP


Mohyee Mikhemar, Broadcom


Pierre Blondy, XLIM


Xun Gong, UCF






The Promise and Limits of On-Chip Filtering and CMOS Wideband Receiver Design

David Murphy; Broadcom

To be practical, wideband receivers must tolerate large out-of-band blockers, which can desensitize the receiver through gain compression or reciprocal mixing with LO phase noise. For example, an E-GSM compliant RX must handle a 0dBm blocker at a 20MHz offset from the wanted signal without excessively degrading the RX's noise figure. Because of such demanding specifications, industry has traditionally shunned wideband RX design in favor of the conventional multiple narrowband approach, where many tuned CMOS front-ends with fixed off-chip filters are used to provide the required frequency coverage.
However, recent circuit innovations such as passive-mixer implementations of N-path filtering is making wideband design more feasible, while the requirement to minimize package pin count and PCB complexity is making such designs more attractive. This workshop will give an overview of the latest circuit research and demonstrate how new CMOS wideband architectures with implicit N-path filtering can, in certain applications, compete with the performance of existing narrowband solutions. Both the limitations and possibilities of such designs will be explored and case studies will be presented.




Reconfigurable and Tunable Micromechanical Filter Technologies for Adaptive RF Systems

Roy H. Olsson III; DARPA

As the radio frequency (RF) spectrum has become more crowded, the need for reconfigurable and adaptable RF components, especially filters, has grown. To address this need micromechanical resonators and filters have been the subject of active research. These resonators and filters are small (<1mm3), have the high quality factors (>1000) desired for steep filter roll-off, can achieve many filters covering a very wide frequency span (kHz to GHz) on a single chip and can be monolithically integrated with CMOS transistors for reconfiguring of a single chip filter array.
This tutorial will overview the different transduction mechanisms and materials used to realize micromechanical resonators and the resulting device performance. The physics underlying the improvements in resonator electromechanical coupling, quality factor and size realized via micromachining will be presented. The limits imposed on filter bandwidth, insertion loss and tuning range by the resonator electromechanical coupling and quality factor will be discussed. Methods for realizing reconfigurable RF filters using switched filter arrays will be detailed along with the limitations of this approach. Finally, nontraditional methods for tuning the center frequency of micromechanical resonators and filters that may offer increases in the tuning range will be presented.




Cellular Terminal Antenna Impedance Tuners in CMOS-SOI Technology

Henrik Sjöland; Lund University

Design considerations of cellular terminal antenna impedance tuners implemented in CMOS-SOI technology will be presented. A recently designed low-band tuner in 130nm technology will serve as an example. It features three digitally controlled switched capacitor banks and two off-chip inductors. To provide a voltage handling of at least 20V, the switched capacitors are implemented with eight stacked transistors and custom made capacitors. The linearity is improved by using negative gate bias of the switch transistors in the off state. The measured OIP3 exceeds +55dBm for all impedance states, covering a VSWR of up to 5.4. The minimum loss is measured to 1dB or lower in the frequency range from 700-900MHz, and the spurious emissions are below -30dBm at +33dBm input power. The tuner has also been used in a MIMO terminal prototype. The performance improvement due to the tuner when using the terminal in different propagation environments and with different user grip styles has been measured, and the net multiplexing gain was 2.5dB in a corridor environment.




Tunable Filters Topologies for 0.7-3 GHz Carrier-Aggregation Wireless Systems

Gabriel Rebeiz; University of California, San Diego

The talk will present the lastest work in tunable bandpass and bandstop filters for multi-carrier radios, also known as carrier-aggregation systems. The filters allow for two bandpass and bandstop responses at the same time, each independently tuned, and are implemented using Schottky diodes and RF MEMS devices. Design methodologies and measured results will be presented.




Self-Interference Cancellation in the RF Domain

Sachin Katti; Stanford

Self-interference arises when radios are tightly packed in a device, its experienced in-band, adjacent-band and out of band. These are commonly known as in-band full duplex, frequency division full duplex and radio coexistence in industry parlance. This talk reviews our recent work on self-interference cancellation, and discusses how it can be applied to handle self-interference problems in multi-band multi-protocol devices.


Linear Wideband Tunable filters using MEMS, SoS and GeTe switches

Pierre Blondy; University of Limoges, Limoges, France

The presentation will cover several examples of tunable filters using innovative tuning technologies. Similar designs will be compared using different technologies, like MEMS and SoS with noticeable differences in loss and linearity. Multistable switches using GeTe materials will be shown and their potential for tunable filters will be presented. This technology will allow reconfiguration of filters and matching network without permanent applied bias.


Recent Advances in Single and Multi-Band Adaptive and Reconfigurable Filters

Andrew C. Guyette1; Roberto Gomez-Garcia2; Eric J. Naglich1; 1NRL, 2University of Alcala, Spain

Advanced reconfigurable and adaptive filters are required to meet the needs of future high-performance microwave systems. Filters are needed that not only have reconfigurable center frequency and bandwidth, but are also capable of operating over multiple frequency bands simultaneously. In addition, the ability to automatically adapt to changes in the spectral environment (e.g. power level of an interferer) is a requirement in situations where a fast reaction time is a concern. This talk will cover recent developments in multi-band reconfigurable filters, switched filters, and RF-power-dependent filters.


Solutions for Reconfigurable Mobile Device RF Front-ends

Art Morris; WiSpry Inc.

Tunable RF elements are now in widespread use within mobile handsets to improve performance, compensate for environmental influences, shrink antenna volumes and shorten design cycles. Many companies are now bringing tuner products to the market utilizing a range of core technologies. As a new component in the RF designer's toolkit, the impact of tunable components on the design and implementation of modern radios is still in its infancy. The performance, size and cost requirements for the tunable elements depend strongly on details of the application.
The most critical challenge facing the RF front end of modern radios arises from the rapidly multiplying frequency bands of operation for 4G systems around the world. In many cases, there is a multiplicity of bands even within individual countries. Each frequency band and mode typically requires customized filtering to handle unique interference challenges. The complexity following the present design approach scales super-linearly due to the interactions between the multiple hardware chains, particularly with regards to matching and isolation. The increase in hardware also applies strong upward pressure on system area and cost while negatively impacting performance, particularly overall efficiency. We present details on a development toward a fully tunable system targeted to replace the large quantity of fixed elements currently required with a scalable and compact global solution.


Design Considerations of High-Q Tunable Filters

Raafat R. Mansour, University of Waterloo, Canada

High performance tunable filters are needed in wireless base stations to facilitate efficient utilization of the available frequency spectrum. They can be employed to replace large filter banks in advanced systems concepts that self-adapt to environmental requirements. In addition, tunable filters can be used to consolidate more hardware into fewer units, which in turn will reduce base-station size and logistics management. The presentation will address recent developments in high-Q tunable filters for wireless base stations. It will also address several important design considerations for such filters.


Micromachined Transfer Function Adaptive Filters

Dimitrois Peroulis; Purdue University

In this talk we will approach the problem of creating adaptive transfer function filters from two angles. First, we will review available and new technologies and second, we will present novel architectures for synthesizing the desired frequency responses. From the technology point of view, the frequency-tunable RF MEMS evanescent-mode cavity technology has been found to be a particularly promising solution. Not only resonators with this technology have shown promising characteristics in multiple areas, but also attractive technology solutions seem to be available to satisfy the remaining challenges. In addition, these resonators are fully scalable from sub-GHz to over 100 GHz while preserving their wide tuning range and low-loss characteristics. The second part of this talk will focus on architectural challenges. Approaches that are based on existing architectures with a mere replacement of static resonators with tunable ones have been proven rather ineffective. This is due to the fact that a fully adaptive response in this case requires not only tunable resonators, but also adaptive inter-resonator and external couplings. Adaptive couplings are quite challenging to implement and often result in significantly worse performance with respect to loss, selectivity, power handling, and linearity. On the other hand, new synthesis approaches that focus on cascading simple building blocks have shown very promising results. In this talk we will review such approaches primarily for interference mitigation applications. Tunable filters with the additional capability of changing their response from bandpass to bandstop will also be discussed. We will finally introduce the concept of Field-programmable Filter Arrays (FPFAs) and also review practical realizations along with their associated coupling matrices.




Session: WSO

Towards 5G: Circuits, Systems, MIMO and Beamforming Techniques


Prof. James Buckwalter, UCSB


Prof. Eric Klumperink, Twente


Prof. Jeyanandh Paramesh


Prof. Huei Wang


 Nothing can grow exponentially forever except – perhaps – for wireless communications. To support the huge demand for gigabit-per-second data rates, much denser networks with smaller cells and millimeter-wave bands are foreseen for next generation 5G wireless systems. There is still room to define how 5G standards will evolve based on MIMO and mm-wave techniques and the new RFIC techniques that will be required. In particular, systems with multiple antennas exploiting MIMO and beamforming will likely play a big role to increase data capacity, reduce interference of RF transmitters, or suppress interference exploiting adaptive beamforming in the receiver. This workshop will bring together industry and academic experts to review the challenges of deploying 5G systems and several enabling mm-wave, RF, and mixed-signal techniques to meet 5G demands.




The Best Future for Wireless: Fluid Standards

Daniel W. Bliss; Arizona State University, Arizona, USA

Hopefully, fluid wireless standards are in your future. Not only should these system be fluid, but they should enable higher performance, higher density, robust adaptive signaling. For good reasons, communications standards have evolved to be inflexible in implementation and fragile in operation. They are now organized as exclusive physical and MAC stovepipes. To minimize size, weight, and power, very specific standards with corresponding inflexible implementations were developed. The classic example is the current "cell phone" implementation with at least four radio systems implement within it. With recent advances in mixed architecture containing both hardware accelerators and flexible processors, there is a path toward fluid standards. These fluid standards should include parametric solutions to simultaneously address the needs of a wide range of radio operations. Cellular, local area, and personal area should be satisfied by a single fluid standard with higher performance enabled across varying system needs.




On the Path to Commercial mmWave Mobile Solutions

Tom Kovarik; Amitava Ghosh; Mark Cudak; Nokia

Projections indicate that cellular capacity will continue to grow at exponential rates and may achieve 1000 times today's capacity by 2020 and perhaps 10,000X by 2025. The large bandwidth of spectrum available in the mm-Wave band makes for an attractive resource to support such capacity gains. Still, numerous challenges face developers of commercial mm-Wave solutions – propagation characteristics and the systems needed to overcome them, cost and power consumption of RF circuitry and data converters as well as PHY and algorithm development for new dynamic systems. This presentation outlines these challenges, identifies the industry trends and notes areas needing additional improvements to make use of mm-Wave spectrum commercially viable.




Filter Bank Multicarrier Techniques for Massive MIMO

Behrouz Farhang-Boroujeny; University of Utah, USA

This contribution discusses filter bank multicarrier (FBMC) as a potential candidate in the application of massive MIMO communication and points out the advantages of FBMC over OFDM (orthogonal frequency division multiplexing). In particular, since FBMC operates without any cyclic prefix, it offers a higher bandwidth efficiency than OFDM. In addition, it is demonstrated that FBMC has a blind equalization capability that makes it an excellent candidate for tracking channel variations in massive MIMO systems. It can be also benefited from as a means of resolving the problem of pilot contamination; a major limiting factor in achieving the full capacity of massive MIMO networks. Moreover, the well localized subcarrier spectra in FBMC allow trivial implementation of carrier aggregation schemes using a single multicarrier processing block. We also discuss various signal processing algorithms that one may take advantage of for efficient implementation of FBMC massive MIMO systems.




Interference Robust CMOS Beamforming Receivers in the low-GHz mobile frequency bands

Bram Nauta; University of Twente, Enschede, The Netherlands

Multi-antenna beamforming in phased-array receivers aims to increase the receiver sensitivity, while providing an opportunity to reject in-band interferers through spatial filtering. This talk will review some available beamforming mechanisms for spatial filtering and discuss circuit design techniques for the implementation of such systems in CMOS technology. The focus is on analog and RF techniques for beamforming based on passive mixers and/or N-path filter techniques. These techniques allow frequency and spatial selectivity which are highly compatible with nanometer CMOS.




Millimeter-wave phased-array systems for 5G communications

Gabriel M. Rebeiz; Samet Zihir; Bon-Huyn Ku; Tumay Kanar; Ozgur Inac; Sang-Young Kim; University of California, San Diego

This talk will present our latest work in millimeter-wave phased-arrays including built-in-self-test and high efficiency antennas. The chips are built so as to allow scalability to a large number of elements (256 or 1024) at 60 GHz or 80 GHz. Several systems will be presented including a 16 element phased array at 80 GHz with +/-50 deg scanning in one plane, and a 64-element phased array with +/- 60 deg. scanning in both planes, making this the largest phased-array every developed in silicon. Design methodologies and measurements will be presented.


Silicon-based ICs and organic packaging/antenna solutions for Gb/s mmWave communications

Alberto Valdes-Garcia; IBM Research

Single-element and phased array mmWave transceiver architectures for directional Gb/s wireless links, suitable for full integration in silicon are reviewed. Antenna diversity and beam forming techniques suitable for low-cost packaging implementation are also discussed, considering both short-range personal communications and long-range back-haul communications. Fully integrated transceiver implementation examples including antennas-in-package at 60GHz and 94GHz are presented to illustrate system-implementation trade-offs, and IC-package co-design challenges.


Wideband Millimeter-wave Beamforming Receivers in Silicon

Jeyanandh Paramesh; Carnegie Mellon University, Pittsburg, US

Millimeter-wave wireless networks have been standardized in the 57-66 GHz band and extensions are under development, notably in the Chinese 43.5-47 GHz IEEE 802.11aj standard. The millimeter-wave bands are being strongly considered for cellular communication, with nearly 29 GHz of bandwidth expected to open up from 28 GHz to 90 GHz. Multi-antenna techniques are essential in such application, and high-performance, low cost transceivers capable of operation over a very wide frequency range are essential. This talk will review current and emerging millimeter-wave transceiver design approaches in silicon (especially CMOS) technologies.


Next generation power amplifier for 5G Handset Application

Bumman Kim, Yunsung Cho; Byungjoon Park; Sangsu Jin
Pohang; University of Science and Technology, Korea

Commercialization of 5G systems has targeted the year 2020 but little about the system architecture has been determined. However, 5G systems will likely operate at mm-wave frequencies using modulation formats that require a linear PA. Current mm-wave PA are usually optimized for transistor operation in the saturated region. The PA should be optimized for linearity with high gain from the device. Design examples at 28 and 60 GHz bands will be presented using current GaAs pHEMT and CMOS devices. For modulated signals, the Doherty architecture may be a good choice and a linear Doherty design will be introduced for high frequency band.


1024-QAM MMW Transceiver for 5G Communications

Tian-Wei Huang; Wei-Heng Lin; Jeng-Han Tsai; Huei Wang; National Taiwan University

To optimize system EVM performance, the IQ modulator and demodulator are key components. Compensation of IQ imbalance at mm-wave frequency is an important enabling technology for gigabit 1024-QAM wireless links. For IQ compensation at V-band or E-band frequency, the phase compensation has more design challenges than the amplitude calibration and composite right/left-handed transmission line, switched capacitor array, and phase shifters have been proposed for the IQ phase calibration. To maintain a high image-rejection ratio of the IQ modulator over a wide bandwidth, a load-insensitive local oscillator (LO) broadband power splitter has been implemented to achieve low amplitude and phase imbalanced structure. All above built-in compensation techniques are innovations that pave the road to the next-generation millimeter-wave 5G mobile smart RFICs.




Session: WSP

Microwave photonics for broadband measurement


Shilong Pan, Nanjing University of Aeronautics and Astronautics


Stavros Iezekiel, University of Cyprus


 The recent advancement of microwave photonics (MWP) techniques has led to the fast development of new and innovative measurement solutions for various applications. MWP based measurement systems have some key advantages including good uniformity across a large bandwidth, high isolation between the input and output, little perturbance to the signals to be measured, and fast response as compared with conventional pure microwave or optical systems. Numerous instruments with unprecedented performance have been developed and are now commercially available, such as a broadband phase noise measurement system based on a fiber delay line which has a phase noise floor of -168 dBc/Hz@10kHz offset at 10 GHz, a wideband microwave electric-field measurement system based on a photonic electromagnetic field sensor with minimal disturbance to the field, and a 40 GHz photonic ADC for directly sampling and characterizing a broadband microwave signal. In addition, many more MWP measurement systems are being developed and commercialized. The objective of this workshop is to discuss the recent developments in MWP-based broadband measurement solutions, including new measurement systems and new devices for broadband measurement. Challenges and future directions in MWP measurement will also be discussed.




High speed and high resolution optical sensing based on optoelectronic oscillators

Jianping Yao; University of Ottawa, Canada

Conventional fiber Bragg grating sensors have a few limitations, such as the limited interrogation resolution when operating at a high speed, and the difficulty in separating different measurands or measuring a specific measurand. In this talk, based on microwave photonics techniques, three different fiber Bragg grating sensors with high interrogation resolution and fast speed are discussed: 1) a linearly chirped fiber Bragg grating sensor based on frequency-to-time mapping and pulse compression, which is able to achieve simultaneous measurements of a strain and temperature at a MHz speed; 2) a strain sensor based on a tunable optoelectronic oscillator employing a single-mode phase-shifted fiber Bragg grating. Ultra-fast interrogation is achieved by directly measuring the oscillation frequency with a high resolution of 3.60 femtometer; 3) a temperature-insensitive transverse load sensor based on a dual-frequency optoelectronic oscillator employing a polarization-maintaining phase-shifted fiber Bragg grating. Fast interrogation is achieved by measuring the difference of the two oscillation frequencies. The sensitivity and the minimal detectable load are measured to be as high as ∼9.73 GHz/(N/mm) and 2.06×10−4 N/mm, respectively.




Microwave Photonics for Broadband Measurements: Generation and Characterization of Low Phase Noise Oscillators

Lute Maleki; OEwaves Inc., USA

Photonics technology has recently produced microwave and mm-wave oscillators with the highest reported spectral purity. These oscillators are based on optoelectronic feedback loops, and on demodulation of optical frequency combs on fast photodetectors. The advent of high performance oscillators has presented a challenge for measurement and characterization of their phase noise. Here again, photonics technology is the suitable solution for the measurement of phase noise of reference signals at microwave and mm-wave frequencies, at a level beyond what is achievable with conventional electronic systems. These and related subjects will be discussed in the presentation.




3D Printed Phased Array Antenna on a Conformable Surface

Ray T. Chen; University of Texas, Austin, USA

: The research topics are focused on three main subjects: (1) Nano-photonic passive and active devices for sensing and interconnect applications, (2) Thin film guided-wave optical interconnection and packaging for 2D and 3D laser beam routing and steering, and (3) True time delay (TTD) wide band phased array antenna (PAA). 3D printing phased array antennas from 8 to 20 GHz on flexible substrates which can be integrated with airborne and spaceborne vehicles with minimum payloads. Both passive and active components will be designed and then printed using newly developed 3D printing technology. Silicon nanomembrane devices will also be integrated to provide switching and modulation functions.




Multi-band digital radars based on photonics

Paolo Ghelfi; Filippo Scotti; CNIT - National Laboratory of Photonics Networks, Pisa, Italy

This work presents a photonics-based architecture of a multi-band coherent digital radar system. The precision and flexibility of photonic technologies are exploited for generating and detecting simultaneously multiple radar signals in an extremely wide frequency range. Moreover, the fully digital approach enables the software defined radio paradigm, allowing the flexible use of several advanced radar techniques, as waveform diversity or frequency hopping. The presented architecture therefore is suitable for future radar systems that need to adapt to different scenarios for improved situation awareness. The proposed system has been implemented exploiting a single laser unit, reducing the architectural complexity with potential benefits on system dimensions, cost and reliability. This work details the principle of operation of the proposed multi-band coherent radar system, and describes the implementation of a proof-of-concept dual-band transceiver operating in the X- and S- bands simultaneously and independently. The results from the characterization of the transceiver are presented. The system validation through the coherent detection of moving targets confirms the suitability of the proposed solution, laying the basis for a new paradigm of radar systems.




Ultra-wideband microwave signal processing based on spatial-spectral holography in photonic materials

Krishna Mohan Rupavatharam; Spectrum Lab, Montana State University, USA

Spatial-spectral holography (S2H) based on optical materials represents a unique approach to the problem of continuous spectral monitoring of ultra-wideband microwave signals. This technique can perform instantaneous capture and processing of multiple signals with complexmodulation formats over extreme bandwidths, with a fast response and low latency. Several analog signal processing capabilities including spectrum analysis, direction finding, range Doppler processing , analog-to-digital conversion , and true-time delay generation have been demonstrated with these photonics systems. This presentation deals with the concept of microwave signal processing with S2H materials, enabling component technologies and demonstrations of applications.